Hostname: page-component-8448b6f56d-sxzjt Total loading time: 0 Render date: 2024-04-23T14:46:22.264Z Has data issue: false hasContentIssue false

Capillary Self-Assembly for 3D Heterogeneous System Integration and Packaging

Published online by Cambridge University Press:  21 July 2016

Yuka Ito*
Affiliation:
Sumitomo Bakelite Company, Ltd., 5-8 Higashi-Shinagawa 2-chome, Tennoz Parkside Building, Shinagawa-ku, Japan
Takafumi Fukushima
Affiliation:
Graduate School of Biomedical Engineering, Tohoku University, 6-6-12 Aza-Aoba, Aramaki, Aoba-Ku, Sendai, Japan
Kang-Wook Lee
Affiliation:
New Industry Creation Hatchery Center (NICHe), Tohoku University, 6-6-10 Aza-Aoba, Aramaki, Aoba-Ku, Sendai, Japan
Tetsu Tanaka
Affiliation:
Graduate School of Biomedical Engineering, Tohoku University, Tohoku University, 6-6-12 Aza-Aoba, Aramaki, Aoba-Ku, Sendai, Japan
Mitsumasa Koyanagi
Affiliation:
New Industry Creation Hatchery Center (NICHe), Tohoku University, 6-6-10 Aza-Aoba, Aramaki, Aoba-Ku, Sendai, Japan
Get access

Abstract

The self-assembly of known good dies (KGDs) on substrates using the liquid capillary method is shown to be a promising technology to achieve three-dimensional (3D) heterogeneous system integration and packaging. Firstly, the effects of the edge structures of self-assembled substrates and chips on alignment accuracies were investigated. When hydrophobic sidewalls with 10-µm-height steps were applied to both chips and assembly sites formed on substrates, the alignment accuracy within 1.0 µm was realized. The alignment accuracies were within 2.0 µm using either substrates or chips having 10-µm-height step structures with hydrophobic sidewalls. Self-assembly of 12-ch vertical-cavity surface-emitting lasers (VCSELs) with a long rectangle shape on glass substrates were also demonstrated. Separation of assembly sites into twelve areas enhanced the resultant force acting on the VCSEL short edge. The enhanced resultant force provided the high alignment accuracies within 2.0 μm. After the self-assembly of the VCSEL and the subsequent thermal compression, the chips successfully exhibited no degradation of their current–voltage (I–V) characteristics and appropriate 850-nm light emission. We demonstrated self-assembly and microbump bonding using non-conductive film (NCF)-covered dies with Cu/Sn microbumps for high-throughput and high-yield multichip-to-wafer 3D integration. The self-assembly of the NCF-covered dies provided high alignment accuracy within 1.1 μm on average. After the self-assembly of NCF-coved dies and thermal compression, microbump chains composed of 7396 bump joints were successfully obtained, resulting in good electrical properties of 32 mΩ/joint without any bridge shorts and failures. The variations of microbump joint resistance were maintained within 5% of the initial value after thermal cycle testing of even 1000 cycles.

Type
Articles
Copyright
Copyright © Materials Research Society 2016 

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

Fukushima, T., Yamada, Y., Kikuchi, H. and Koyanagi, M., “New Three-Dimensional Integration Technology Using Self-Assembly Technique”, IEDM Tech. Dig., (2005), p.359.Google Scholar
Fukushima, T., Iwata, E., Ohara, Y., Murugesan, M., Bea, J.-C., Lee, K.-W., Tanaka, T. and Koyanagi, M., IEEE Trans. Compon., Packag., Manuf. Technol. 1, 12, 1873 (2011).Google Scholar
Lee, K.-W., Kanno, S., Kiyoyama, K., Fukushima, T., Tanaka, T. and Koyanagi, M., J. Microelectromech. Syst. 19, 6, 284 (2010).Google Scholar
Fukushima, T., Iwata, E., Konno, T., Bea, J.-C., Lee, K.-W., Tanaka, T. and Koyanagi, M., Appl. Phys. Lett., 96, 15, 154105 (2010).CrossRefGoogle Scholar
Fukushima, T., Iwata, E., Ohara, Y., Murugesan, M., Bea, J., Lee, K., Tanaka, T. and Koyanagi, M., , IEEE Trans. Electron Devices, 59, 2956 (2012).CrossRefGoogle Scholar
Ito, Y., Fukushima, T., Kino, H., Lee, K.-W., Tanaka, T. and Koyanagi, M., J. Microelectromech. Systems, 25, 91 (2016).Google Scholar
Fukushima, T., Kikuchi, H, Yamada, Y., Konno, T., Liang, J., Sasaki, K., Inamura, K., Tanaka, T. and Koyanagi, M., “New Three-Dimensional Integration Technology Based on Reconfigured Wafer-on-Wafer Bonding Technique”, IEDM Tech. Dig., (2007), p.985.Google Scholar
Fukushima, T., Konno, T., Kiyoyama, K., Murugesan, M., Sato, K., Jeong, W.-C., Ohara, Y., Noriki, A., Kanno, S., Kaiho, Y., Kino, H., Makita, K., Kobayashi, R., Yin, C.-K., Inamura, K., Lee, K.-W., Bea, J.-C., Tanaka, T. and Koyanagi, M., “New Heterogeneous Multi-Chip Module Integration Technology Using Self-Assembly Method”, IEDM Tech. Dig., (2008), p. 499.Google Scholar
Lee, K.-W., Noriki, A., Kiyoyama, K., Kanno, S., Kobayashi, R., Jeong, W.-C., Bea, J.-C., Fukushima, T., Tanaka, T. and Koyanagi, M., “3D heterogeneous opto-electronic integration technology for system-on-silicon (SOS),” in Proc. IEEE Int. Electron Devices Meeting, Baltimore, MD, pp. 531 (2009).Google Scholar
Fukushima, T., Hashiguchi, H., Bea, J., Ohara, Y., Murugesan, M., Lee, K.-W., Tanaka, T. and Koyanagi, M., “New Chip-to-Wafer 3D Integration Technology Using Hybrid Self-Assembly and Electrostatic Temporary Bonding”, IEDM Tech. Dig., (2012), p.789.Google Scholar
Ito, Y., Fukushima, T., Lee, K.-W., Choki, K., Tanaka, T. and Koyanagi, M., Jpn. J. Appl. Phys. 52, 04CB09 (2013).CrossRefGoogle Scholar
Ito, Y., Fukushima, T., Lee, K.-W., Choki, K., Tanaka, T., and Koyanagi, M.,“Flux-Assisted Self-Assembly with Microbump Bonding for 3D Heterogeneous Integration”, Proc. 63rd Electron Components Technology Conf. (ECTC), Las Vegas, NV, 2013, pp. 891.Google Scholar
Fukushima, T., Bea, J. C., Kino, H., Nagai, C., Murugesan, M., Hashiguchi, H., Lee, K.-W., Tanaka, T. and Koyanagi, M., IEEE Trans. Electron Devices 61, 533 (2014).Google Scholar
Ito, Y., Fukushima, T., Kino, H., Lee, K.-W., Choki, K., Tanaka, T. and Koyanagi, M., Jpn. J. Appl. Phys. 54, 030206 (2015).Google Scholar
Ito, Y., Fukushima, T., Lee, K.-W., Choki, K., Tanaka, T., and Koyanagi, M., “Direct Multichip-to-Wafer 3D Integration Technology Using Flip-Chip Self-Assembly of NCF-Covered Known Good Dies”, in Proc. the 64th Electronic Components and Technology Conference (ECTC), Orlando, FL, 2014, pp. 856.Google Scholar
Ito, Y., Murugesan, M., Kino, H., Fukushima, T., Lee, K.-W., Choki, K., Tanaka, T., and Koyanagi, M., “Development of Highly-Reliable Microbump Bonding Technology using Self-Assembly of NCF-Covered KGDs and Multi-Layer 3D Stacking Challenges” in Proc. the 65th Electronic Components and Technology Conference (ECTC), San Diego, CA, 2015, pp. 336.Google Scholar