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Ion Implantation Through Thin Silicon Dioxide Layers for Si-based Solid-State Quantum Computer Device Development

  • Jeffrey McCallum (a1), Michael L. Dunn (a1) and Eric Gauja (a2)

Abstract

Ion implantation doping of Si through an SiO2 overlayer is of interest for fabrication of a range of devices on the pathway to development of a solid–state quantum computer (SSQC). The fabrication requirements of devices based on the Kane architecture typically involve implantation through a pre-existing thin device–quality thermal oxide at low fluences ∼1011 cm−2 and ion energies in the range 10 – 20 keV. Here we present results from a deep level transient spectroscopy studies of ion–implanted MOS capacitors in which interface–trap densities have been measured in as–grown and H–passivated thermal oxides and in ion implanted and rapid–thermally processed devices. For thin oxides of 5nm or less and low ion fluences we find that implantation does not significantly increase interface trap densities and somewhat surprisingly that it can even be beneficial when the interface trap density is abnormally high, (∼ 1 × 1011 cm −2.eV −1) in the as-grown oxide.

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Keywords

Ion Implantation Through Thin Silicon Dioxide Layers for Si-based Solid-State Quantum Computer Device Development

  • Jeffrey McCallum (a1), Michael L. Dunn (a1) and Eric Gauja (a2)

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