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Design, modeling and characterization of MMIC integrated cascode cell for compact Ku-band power amplifiers

Published online by Cambridge University Press:  24 May 2013

A. Déchansiaud ,
R. Sommet ,
T. Reveyrand ,
D. Bouw ,
C. Chang ,
M. Camiade ,
F. Deborgies  and
R. Quéré
A. Déchansiaud*
Affiliation:
XLIM, UMR CNRS 6172, 7 rue Jules Valles, 19100 Brive la Gaillarde, France. Phone: +33 561 111 122
R. Sommet
Affiliation:
XLIM, UMR CNRS 6172, 7 rue Jules Valles, 19100 Brive la Gaillarde, France. Phone: +33 561 111 122
T. Reveyrand
Affiliation:
XLIM, UMR CNRS 6172, 7 rue Jules Valles, 19100 Brive la Gaillarde, France. Phone: +33 561 111 122
D. Bouw
Affiliation:
United Monolithic Semiconductors, Batiment Charmille, Parc SILIC de Villebon-Courtaboeuf, 10 avenue du Quebec, 91140 Villebon-sur-Yvette, France
C. Chang
Affiliation:
United Monolithic Semiconductors, Batiment Charmille, Parc SILIC de Villebon-Courtaboeuf, 10 avenue du Quebec, 91140 Villebon-sur-Yvette, France
M. Camiade
Affiliation:
United Monolithic Semiconductors, Batiment Charmille, Parc SILIC de Villebon-Courtaboeuf, 10 avenue du Quebec, 91140 Villebon-sur-Yvette, France
F. Deborgies
Affiliation:
European Space Agency, Keplerlaan 1 - NL 2201 AZ Noordwijk ZH, Netherlands
R. Quéré
Affiliation:
XLIM, UMR CNRS 6172, 7 rue Jules Valles, 19100 Brive la Gaillarde, France. Phone: +33 561 111 122
*
Corresponding author: A. Déchansiaud Email: adeline.dechansiaud@nxp.com
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Abstract

This paper reports on the design of a new power cell dedicated to Ku-band power amplifier (PA) applications. This cell called “integrated cascode” has been designed in order to propose a strong decrease in terms of circuit size for PA. The technology used relies on 0.25-μm GaAs pseudomorphic high electron mobility transistors (PHEMT) of United Monolithic Semiconductors (UMS) foundry. A distributed approach is proposed in order to model this power cell. The challenge consists of obtaining, with a better shape factor (ratio between the vertical and horizontal sizes of the transistor), the same performances than a single transistor with the same gate width. In order to design a 2W amplifier, we have used two 12 × 100 μm transistors. Cascode vertical size is 413 μm whereas a transistor with the same gate width exhibits a vertical size of 790 μm. Therefore, the shape factor is nearly one as compared to a shape factor of 4 for a classical parallel architecture. This new device allows us to decrease the Monolithic microwave integrated circuit amplifier area of 40% compared to amplifier based on single transistors.

Keywords

ModelingSimulation and characterization of devices and circuitsCircuit design and applications
Type
Research Papers
Information
International Journal of Microwave and Wireless Technologies , Volume 5 , Special Issue 3: European Microwave Week 2012 , June 2013 , pp. 261 - 269
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2013 

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References

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