Skip to main content Accessibility help
×
Home

Computationally efficient real-time digital predistortion architectures for envelope tracking power amplifiers

  • Pere L. Gilabert (a1) and Gabriel Montoro (a1)

Abstract

This paper presents and discusses two possible real-time digital predistortion (DPD) architectures suitable for envelope tracking (ET) power amplifiers (PAs) oriented at a final computationally efficient implementation in a field programmable gate array (FPGA) device. In ET systems, by using a shaping function is possible to modulate the supply voltage according to different criteria. One possibility is to use slower versions of the original RF signal's envelope in order to relax the slew-rate (SR) and bandwidth (BW) requirements of the envelope amplifier (EA) or drain modulator. The nonlinear distortion that arises when performing ET with a supply voltage signal that follows both the original and the slow envelope will be presented, as well as the DPD function capable of compensating for these unwanted effects. Finally, two different approaches for efficiently implementing the DPD functions, a polynomial-based and a look-up table-based, will be discussed.

Copyright

Corresponding author

Corresponding author: Pere L. Gilabert Email: plgilabert@tsc.upc.edu

References

Hide All
[1]Kim, B.; Kim, I.; Moon, J.: Advance Doherty architecture. IEEE Microw. Mag., 11 (2010), 7286.
[2]Raab, F.; Sigmon, B.; Myers, R.; Jackson, R.: L-band transmitter using Kahn EER technique. IEEE Trans. Microw. Theory Tech., 46 (1998), 22202225.
[3]Wang, F. et al. : An improved power-added efficiency 19 dBm hybrid envelope elimination and restoration power amplifier for 802.11 g WLAN applications. IEEE Trans. Microw. Theory Tech., 54 (2006), 40864099.
[4]Taromaru, M.; Ando, N.; Kodera, T.; Yano, K.: An EER transmitter architecture with burst-width envelope modulation based on triangle wave comparison PWM, in Proc. IEEE Int. Symp. Personal, Indoor and Mobile Radio Communications (PIMRC’07), Athens, Greece, September 2007, 15.
[5]Jeong, J.; Kimball, D.F.; Kwak, M.; Hsia, C.; Draxler, P.; Asbeck, P.M.: Wideband envelope tracking power amplifiers with reduced bandwidth power supply waveform and adaptive digital predistortion techniques. IEEE Trans. Microw. Theory Tech., 57 (2009), 33073314.
[6]Mustafa, A.K.; Bassoo, V.; Faulkner, M.: Reducing drive signal bandwidths of EER microwave power amplifiers, in IEEE MTT Int. Microwave Symp. (IMS 2009), Boston, USA.
[7]Kim, J.; Konstantinou, K.: Digital predistortion of wideband signals based on power amplifier model with memory. Electron. Lett., 37 (23) (2001), 14171418.
[8]Montoro, G.; Gilabert, P.L.; Bertran, E.; Berenguer, J.: A method for real-time generation of slew-rate limited envelopes in envelope tracking transmitters, in IEEE Int. Microwave Series on RF Front-ends for Software Defined and Cognitive Radio Solutions, Aveiro, Portugal, February 2010, 14.
[9]Gilabert, P.L.; Montoro, G.: Look-up table implementation of a slow envelope dependent digital predistorter for envelope tracking power amplifiers. IEEE Microw. Wirel. Compon. Lett., 22 (2) (2012), 9799.
[10]Montoro, G.; Gilabert, P.L.; Berenguer, J.; Bertran, E.: Digital predistortion of envelope tracking amplifiers driven by slew-rate limited envelopes, in IEEE Int. Microwave Symp. (IMS’2011), Baltimore, USA, June 2011.
[11]Wimpenny, G.: Envelope Tracking PA Characterisation. White Paper. Open ET Alliance (http://www.open-et.org). November 2011.
[12]Hanington, G.; Chen, P.-F.; Asbeck, P.M.; Larson, L.E.: High-efficiency power amplifier using dynamic power-supply voltage for CDMA applications. IEEE Trans. Microw. Theory Tech., 47 (1999), 14711476.
[13]Hoversten, J.; Schafer, S.; Roberg, M.; Norris, M.; Maksimovic, D.; Popovic, Z.: Codesign of PA, supply, and signal processing for linear supply-modulated RF transmitters. IEEE Trans. Microw. Theory Tech., 60 (2012), 20102020.
[14]Vizarreta, P.; Montoro, G.; Gilabert, P.A.: Hybrid envelope amplifier for envelope tracking power amplifier transmitters, in European Microwave Conf. (EuMC’12), Amsterdam, Holland, November 2012, 14.
[15]Gilabert, P.L.; Montoro, G.; Vizarreta, P.: Slew-rate and efficiency trade-off in slow envelope tracking power amplifiers, in German Microwave Conf. (GeMiC'12), Ilmenau, Germany, March 2012, 14.
[16]Mrabet, N.; Mohammad, I.; Mkadem, F.; Rebai, C.; Boumaiza, S.: Optimized hardware for polynomial digital predistortion system implementation, in IEEE Topical Conf. on Power Amplifiers for Wireless and Radio Applications (PAWR), Santa Clara, USA, January 2012, 8184.
[17]Gilabert, P.L.; Montoro, G.; Bertran, E.: FPGA implementation of a real-time NARMA-based digital adaptive predistorter. IEEE Trans. Circuits Syst. II, 57 (2011), 402406.
[18]Julius, S.; Dinh, A.: Evaluation of a digital predistortion on FPGA for power amplifier linearization, in IEEE Canadian Conf. on Electrical and Computer Eng. (CCECE), Montreal, Canada, May 2011, 660664.

Keywords

Related content

Powered by UNSILO

Computationally efficient real-time digital predistortion architectures for envelope tracking power amplifiers

  • Pere L. Gilabert (a1) and Gabriel Montoro (a1)

Metrics

Altmetric attention score

Full text views

Total number of HTML views: 0
Total number of PDF views: 0 *
Loading metrics...

Abstract views

Total abstract views: 0 *
Loading metrics...

* Views captured on Cambridge Core between <date>. This data will be updated every 24 hours.

Usage data cannot currently be displayed.