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Switching and Finite Automata Theory
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  • Cited by 23
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    Rahaman, Mohammad Fayazur and Khan, Mohammed Zafar Ali 2018. Low-Complexity Optimal Hard Decision Fusion Under the Neyman–Pearson Criterion. IEEE Signal Processing Letters, Vol. 25, Issue. 3, p. 353.

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    Badawi, Emad El-Fakih, Khaled and Barlas, Gerassimos 2018. GPU and Multiprocessing Parallel Implementations for the Elimination of Finite State Machine Mutants. p. 187.

    Lee, Choongin Bae, Jeonghan and Lee, Heejo 2018. ICT Systems Security and Privacy Protection. Vol. 529, Issue. , p. 141.

    Erdem, Oğuzhan 2016. Tree-based string pattern matching on FPGAs. Computers & Electrical Engineering, Vol. 49, Issue. , p. 117.

    Hatwagner, Miklos F. and Koczy, Laszlo T. 2015. Parameterization and concept optimization of FCM models. p. 1.

    Abdel-hafeez, Saleh Parhami, Behrooz and Al-Hammouri, Mohammad 2015. A mixed analog–digital fast hamming-weight filtering circuit using switched-capacitor arrays. Analog Integrated Circuits and Signal Processing, Vol. 83, Issue. 1, p. 35.

    Drusinsky, Doron 2014. Runtime monitoring and verification of systems with hidden information. Innovations in Systems and Software Engineering, Vol. 10, Issue. 2, p. 123.

    Li, Ming and Ravikumar, Bala 2014. Computing Handbook, Third Edition. p. 1.

    Lukac, M. Kameyama, M. Perkowski, M. and Kerntopf, P. 2013. Analysis of Reversible and Quantum Finite State Machines Using Homing, Synchronizing and Distinguishing Input Sequences. p. 322.

    Saxena, Vipin and Pratap, Ajay 2012. Modeling and Validation of Object-Oriented DatabaseSystem. International Journal of Computer and Electrical Engineering, p. 626.

    Zeitler, Georg Singer, Andrew C. and Kramer, Gerhard 2012. Low-Precision A/D Conversion for Maximum Information Rate in Channels with Memory. IEEE Transactions on Communications, Vol. 60, Issue. 9, p. 2511.

    Babulu, K. and Rajan, K. Soundara 2008. FPGA Implementation of USB Transceiver Macrocell Interface with USB2.0 Specifications. p. 966.

    Remacle, F. and Levine, R. D. 2006. All-optical digital logic: Full addition or subtraction on a three-state system. Physical Review A, Vol. 73, Issue. 3,

    Perkowski, M. Biamonte, J. and Lukac, M. 2005. Test Generation and Fault Localization for Quantum Circuits. p. 62.

    Sinha, S. Kuehlmann, A. and Brayton, R.K. 2001. Sequential SPFDs. p. 84.

    Chrzanowska-Jeske, M. Wei Wang Jing Xia and Jeske, M. 2000. Disjunctive decomposition of switching functions using symmetry information. p. 69.

    Karoui, K. Ghedamsi, A. and Dssouli, R. 1999. A study of some influencing factors in testability and diagnostics based on FSMs. p. 109.

    Kremer, Stefan 1999. Recurrent Neural Networks. Vol. 19994575, Issue. ,

  • 3rd edition
  • Zvi Kohavi, Technion - Israel Institute of Technology, Haifa , Niraj K. Jha, Princeton University, New Jersey

Book description

Understand the structure, behaviour, and limitations of logic machines with this thoroughly updated third edition. Many new topics are included, such as CMOS gates, logic synthesis, logic design for emerging nanotechnologies, digital system testing, and asynchronous circuit design, to bring students up-to-speed with modern developments. The intuitive examples and minimal formalism of the previous edition are retained, giving students a text that is logical and easy to follow, yet rigorous. Kohavi and Jha begin with the basics, and then cover combinational logic design and testing, before moving on to more advanced topics in finite-state machine design and testing. Theory is made easier to understand with 200 illustrative examples, and students can test their understanding with over 350 end-of-chapter review questions.


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