Book contents
- Frontmatter
- Contents
- Acknowledgments
- 1 Introduction
- 2 Channel-based asynchronous design
- 3 Modeling channel-based designs
- 4 Pipeline performance
- 5 Performance analysis and optimization
- 6 Deadlock
- 7 A taxonomy of design styles
- 8 Synthesis-based controller design
- 9 Micropipeline design
- 10 Syntax-directed translation
- 11 Quasi-delay-insensitive pipeline templates
- 12 Timed pipeline templates
- 13 Single-track pipeline templates
- 14 Asynchronous crossbar
- 15 Design example: the Fano algorithm
- Index
- References
2 - Channel-based asynchronous design
Published online by Cambridge University Press: 26 February 2010
- Frontmatter
- Contents
- Acknowledgments
- 1 Introduction
- 2 Channel-based asynchronous design
- 3 Modeling channel-based designs
- 4 Pipeline performance
- 5 Performance analysis and optimization
- 6 Deadlock
- 7 A taxonomy of design styles
- 8 Synthesis-based controller design
- 9 Micropipeline design
- 10 Syntax-directed translation
- 11 Quasi-delay-insensitive pipeline templates
- 12 Timed pipeline templates
- 13 Single-track pipeline templates
- 14 Asynchronous crossbar
- 15 Design example: the Fano algorithm
- Index
- References
Summary
This chapter is an introduction to asynchronous handshaking and typical asynchronous modules, with an emphasis on asynchronous designs that follow a channel-based discipline. The detailed implementation of these modules will be described in later chapters.
Asynchronous channels
As mentioned earlier, asynchronous designs are often composed of a hierarchical network of blocks, which contain ports interconnected via asynchronous channels. These channels are simply a bundle of wires and a protocol for synchronizing computation and communicating data between blocks. The smallest block that communicates with its neighbors using asynchronous channels is called a leaf cell. Larger blocks that communicate via channels may be called modules.
Numerous forms of channels have been developed that trade robustness to timing variations with improved power and performance, and this section reviews some of the most popular forms.
Bundled-data channels
Bundled-data channels consist of a single request line bundled with a unidirectional single-rail data bus that is coupled with an acknowledgement wire. In the typical bundled-data push channel, illustrated in Figure 2.1, the sender initiates the communication and tells the receiver when new valid data is available.
Bundled-data channels can be implemented with two-phase handshaking, in which there is no distinction in meaning between the rising and falling transitions of the request and acknowledge handshaking wires. More specifically, both the rising and falling transitions of the request wire indicate the validity of new data at the output of the sender, and both the rising and falling transitions of the acknowledge signal indicate that the data has been consumed by the receiver, as illustrated in Figure 2.2.
- Type
- Chapter
- Information
- A Designer's Guide to Asynchronous VLSI , pp. 16 - 42Publisher: Cambridge University PressPrint publication year: 2010
References
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