ECR plasma etching of SiO2 films and post-etch cleaning and passivation of the Si substrate in a dual-function module are reported. The goal is development of a single-chamber etch/clean module for fabrication of FET's with a stacked gate - raised source/drain architecture. With He fed to the ECR source cavity and CF4 (5 sccm) injected downstream, an average Si0 2 etch rate of 390 A/min was measured at 1.1 mTorr under autothermal conditions. Addition of H2 inhibited etching but improved Si0 2/Si etching selectivity. Etching products (COF2 and SiF4) were monitored by quadrupole mass spectrometry, and the signals were used for real-time end-point detection. In situ, off-line AES analyses were made on wafers following interrupted-cycle processing. Over-etched wafers were coated by a fluorocarbon film. H2 -addition increased surface carbon concentrations during etching, and fluorocarbon buildup at the end point. O2 and H2 plasma cycles were investigated for post-etch surface cleaning/passivation.