A novel technique to reduce planar defects in 3C-SiC is to grow it on “undulant-Si” substrates, on which the surface forms countered slopes oriented in the  and  directions. In the initial stage of 3C-SiC growth, step flow epitaxy occurs on each slope of the substrate, reducing the anti-phase boundaries. Then, the stacking faults in the (111) and (111) planes are gradually annihilated by combining with counter-stacking faults, while those parallel to (111) and (111) vanish. The freestanding 3C-SiC exhibits anisotropy in its electrical properties. The origin of the anisotropy in electrical properties is discussed by referring to the results of X-ray diffraction study.