Compressive strained Silicon from a Silicon on Insulator (SOI) substrate is obtained by replacing the buried oxide layer by a strained silicon nitride layer. The silicon overlayer and the buried dielectric are etched down to the substrate to form narrow wires (down to 300 nm wide). The Si overlayer is then expected to acquire compressive strain thanks to the relaxation of the SiN layer. The goal is to obtain a high uniaxial stress perpendicular to the wires. The structures and the strain are modeled using finite element simulations. The strain elements are used to calculate Raman spectra. Theoretical results are compared to experimental profiles deduced from resonant (UV) micro Raman experiments.