Intrinsic point defects determine to a large extent the semiconductor crystal quality both mechanically and electrically not only during crystal growth or when tuning polished wafer properties by thermal treatments, but also and not the least during device processing. Point defects play e.g. a crucial role in dopant diffusion and activation, in gettering processes and in extended lattice defect formation.

Available experimental data and results of numerical calculation of the formation energy and diffusivity of the intrinsic point defects in Si and Ge are compared and discussed. Intrinsic point defect clustering is illustrated by defect formation during Czochralski crystal growth.

Results are presented of the simulation of the properties of vacancy clusters in single crystal germanium. Classical molecular dynamics calculations based on a Stillinger and Weber potential were used in a theoretical investigation of different growth patterns of vacancy clusters Vi. The formation and binding energies of vacancy clusters have been studied in the range 1 ≤ i ≤ 35. The energetically favourable growth mode and an estimate of the effective surface energy was determined for a vacancy clusters containing up to 35 vacancies

The impact of metallic impurities on the carrier lifetime in n-Ge is studied using microwave reflection and absorption techniques. Co, Fe, Ti, Ni and Cr are introduced by ion implantation followed by a thermal anneal and quenching to room temperature. Excess carrier decay transients are examined by microwave reflection and absorption probing after pulsed light excitation. A detailed analysis allows to evaluate the ratio of the capture cross-sections for minority and majority carriers revealing an acceptor-like character of the metal induced traps. Cross-sectional lifetime measurements show an U-shaped depth distribution with the lowest lifetimes in the bulk of the wafer. The lifetime results are correlated with those of deep level transient spectroscopy in order to clarify the properties of the dominant metal related recombination centres. Fe and Co are the most effective lifetime killers in n-Ge while Cr has the least influence.

Results are presented of an in-situ study of 1-MeV electron irradiation induced {113}-defect generation in silicon with boron, phosphorus or arsenic doped surface layers. By 1-MeV electron irradiation in a high voltage transmission electron microscope, {113}-defects are dorni-nandy formed in areas with a well defined dopant concentration range which depends on the tjpe of dopant atom, the irradiation temperature and fluence and the sample thickness. The observations for samples with boron and phosphorus concentration profiles are compared with published data on electron irradiation induced ( 113}-defect formation in uniformly doped silicon. In the present paper first results on heavily arsenic doped silicon are presented. It is shown that ihe observed dopant dependence of the {113}-defect generation can be understood on the basis of known point defect reactions. A few irradiation experiments are also performed on a local isolation structure illustrating for the first time the influence of localised tensile and compressive strain fields on {113} -defect nucleation.

In this paper results of a study of electron irradiation induced extended defect generation in doped silicon is presented. The irradiations are performed in-situ with 1 MeV electrons in a high voltage transmission electron microscope. Preferential generation of extended defects is observed in certain areas of the sample which can be correlated with well defined dopant concentration levels. The defect growth kinetics is studied as a function of the irradiation temperature and dose and the type and concentration of dopant.

After the first irradiation experiment some of the samples received a second electron irradiation, during which shrinkage and even complete annihilation of the previously generated defects can be observed. The observed results are interpreted on the base of point defect reactions.

The structural characterization of the oxygen related lattice defects formed under different thermal cycling conditions is discussed. The present understanding on the nature of rod-like defects and oxide precipitates is reviewed. Attention is given to the whole lattice defect spectrum which is induced by the oxygen precipitation. The influence of carbon and dopants on the defects is discussed.

Micro Raman spectroscopy (RS) is used to study the crystalline quality and the stresses in the thin superficial silicon layer of Silicon-On-Insulator (SO) materials. Results are presented for SIMOX (Separation by IMplanted OXygen) and ZMR (Zone Melt Recrystallized) substrates. Both as implanted and annealed SIMOX structures are investigated. The results from the as implanted structures are correlated with spectroscopic ellipsometry (SE) and cross-section transmission electron microscopy (TEM) analyses on the same material. Residual stress in ZMR substrates is studied in low- and high temperature gradient regions.

In this paper we present a rapid and highly precise plan view and cross-section specimen preparation technique for the localized thinning of semiconductor devices for TEM investigation. No special equipment except the commercially available one is required. Crosssection preparation takes about 6 hours, while plan view takes about 4 hours. Prespecified areas of 0.6 μm wide and 10 μm long can easily be thinned with transparency for CTEM and HREM. Using an iterative ion milling procedure allows to scan a complete device in HREM.

GaAs is grown embedded in pre-etched wells in the Si substrate. HNO3:HF, KOH:H2O and a dry etch technique are used as alternatives to form the wells. Cross-sectional SEM views of AlGaAs/GaAs heterostructures reveal the growth front and facet formation for the different sidewall geometries. Transmission electron microscopy is used to study epilayer degradation in relation to the substrate damage and the presence of edge induced defects in the GaAs. Cathodoluminescence reveals the uniformity of strain present in the GaAs layer embedded in the wet etched well. The impact of the different etching techniques on device integration is briefly discussed.