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The opto-electronic properties of CuInSe2 and related compounds depend on their defect chemistry in a way that is far from being understood and in which ab initio calculations could help by providing new insights as shown previously. Ab initio calculations of energy and electronic structure of various intrinsic (including defect pairs) and extrinsic (including potential dopants such as Zn) point defects have been performed in the chalcopyrite semiconductors CuInSe2, some of them being computed for the first time by advanced ab initio techniques. The method used is based on the density functional theory within the framework of pseudo-potentials and plane waves basis set. The results are discussed in view of the existing data, models and calculations.
CuInSe2 and Cu(In, Ga)Se2 precursor layers have been prepared by electrodeposition, with morphologies suitable for device completion. These precursor films were transformed into photovoltaic quality films after thermal annealing without any post-additional vacuum deposition process. Depending on the preparation parameters annealed films with different band gaps between 1eV and 1.5 eV have been prepared. The dependence of resulting solar cell parameters has been investigated. The best efficiency achieved is about 10,2 % for a band gap of 1.45 eV. This device presents an open circuit voltage value of 740 mV, in agreement with the higher band gap value. Device characterisations (current-voltage, capacitance-voltage and spectral response analysis) have been performed. Admittance spectroscopy at room temperature indicates the presence of two acceptor traps at 0.3 and 0.43 eV from the valance band with density of the order of 2. 1017 cm-3 eV-1.
Chemistry of co-evaporated CIGS surfaces submitted to chemical treatments relevant to fabrication steps were investigated by XPS and admittance spectroscopy. A Se XPS signal specific of the CIGS surfaces was identified. Surface states seen by Admittance and surface chemistry are seen to change significantly during the elaboration steps. Consequences for device elaboration are briefly discussed.
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