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Semiconducting and insulating polymers and copolymers/Au nanograins based hybrid multilayers (HyMLs) were fabricated on p-Si single-crystal substrate by an iterative method that involves, respectively, Langmuir-Blodgett and spin-coating techniques (for the deposition of organic film) and sputtering technique (for the deposition of metal nanograins) to prepare Au/HyMLs/p-Si Schottky device. The electrical properties of the Au/HyMLs/p-Si Schottky device were investigated by current-voltage (I–V) measurements in the thickness range of 1-5 bilayers (BL).
At different number of layers, current-voltage (I–V) measurements were performed. Results showed a rectifying behavior. Junction parameters, such as barrier height (BH), from the I–V measurements for example for the PMMA-b-PS based Au/HyMLs/p-Si structure were obtained as 0.72±0.02 eV at 1BL and 0.64±0.02eV at 5BL. It was observed that the BH value of 0.61 eV obtained for the 5 BL PS based Au/HyMLs/p-Si structure was lower than the value of 0.68 eV of conventional Au/p-Si Schottky diodes. Thus, modification of the interfacial potential barrier for Au/p-Si diodes has been achieved using a thin MLs of different polymers based HyMls semiconductor.
To form crystalline Si dots embedded in SiO2, we have deposited thin films of silicon rich oxide (SRO) by plasma-enhanced chemical vapor deposition of SiH4 and O2. Then the materials wereannealed in N2 ambient at temperatures between 950 and 1100 °C. Under such processing, the supersaturation of Si in the amorphous SRO film produces the formation of crystalline Si dots embedded in SiO2. The narrow dot size distributions, analyzed by transmission electron microscopy, are characterized by average grain radii and standard deviations down to about 1 nm. The memory function of such structures has been investigated in metal-oxidesemiconductor (MOS) capacitors with a SRO film sandwiched between two thin SiO2 layers as insulator and with an n+ polycrystalline silicon gate. The operations of write and storage are clearly detected by measurements of hysteresis in capacitance-voltage characteristics and they have been studied as a function of bias.
We have studied the effects of nitridation on the leakage current of thin (7-8 nm) gate or tunnel oxides. A polarity dependence of the tunneling current has been found this behavior is related to the presence of a thin silicon oxynitride layer at the SiO2/Si-substrate interface. The oxynitride layer lowers the tunneling current when electrons are injected from the interface where the oxynitride is located (substrate injection). The current flowing across the oxide when electrons are injected from the opposite interface (gate injection) is not influenced by the oxynitride. The increase of nitrogen concentration leads to a decrease of the tunneling current for substrate electron injection.
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