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Group III-Sb compound semiconductors are promising materials for future CMOS circuits. Especially, In1-xGaxSb is considered as a complimentary p-type channel material to n-type In1-xGaxAs MOSFET due to the superior hole transport properties and similar chemical properties in III-Sb’s to those of InGaAs. The heteroepitaxial growth of In1-xGaxSb on Si substrate has significant advantage for volume fabrication of III-V ICs. However large lattice mismatch between InGaSb and Si results in many growth-related defects (micro twins, threading dislocations and antiphase domain boundaries); these defects also act as deep acceptor levels. Accordingly, unintentional doping in InGaSb films causes additional scattering, increase junction leakages and affects the interface properties. In this paper, we studied the correlations between of defects and hole carrier densities in GaSb and strained In1-xGaxSb quantum well layers by using various designs of metamorphic superlattice buffers.
The paper reports on the growth of group III-Sb’s on silicon, substrate preparation, optimization of AlGaSb metamorphic buffer, formation of defects (threading dislocations, microtwins and anti-phase boundaries) and their effect on the surface morphology and electrical properties of these high hole mobility materials for future III-V CMOS technology. Defect density was found to be 2-3x higher than in similar structures grown on GaAs, resulting in 2x higher roughness. Defects also result in background p-type doping well above 1017 cm-3 causing inversion of polarity from n-type to p-type in thin n-type doped GaSb. MOS Capacitors fabricated on these buffers demonstrate similar characteristics to higher quality GaSb-on-GaAs. The highest hole mobility obtained in a strained InGaSb QW MOS channel grown on silicon is ∼630 cm2/V-s which is ∼30% lower than similar channels grown on GaAs substrates.
We analyze spin wave-based logic circuits as a possible route to building reconfigurable magnetic circuits compatible with conventional electron-based devices. A distinctive feature of the spin wave logic circuits is that a bit of information is encoded into the phase of the spin wave. It makes possible to transmit information as a magnetization signal through magnetic waveguides without the use of an electric current. By exploiting sin wave superposition, a set of logic gates such as AND, OR, and Majority gate can be realized in one circuit. We present experimental data illustrating the performance of a three-terminal micrometer scale spin wave-based logic device fabricated on a silicon platform. The device operates in the GHz frequency range and at room temperature. The output power modulation is achieved via the control of the relative phases of two input spin wave signals. The obtained data shows the possibility of using spin waves for achieving logic functionality. The scalability of the spin wave-based logic devices is defined by the wavelength of the spin wave, which depends on the magnetic material and waveguide geometry. Potentially, a multifunctional spin wave logic gate can be scaled down to 0.1μm2. Another potential advantage of the spin wave-based logic circuitry is the ability to implement logic gates with fewer elements as compared to CMOS-based circuits in achieving same functionality. The shortcomings and disadvantages of the spin wave-based devices are also discussed.
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