In this study, we investigate the charge-transport behavior in a disordered one-dimensional (1D) chain of metallic islands using the newly developed multi-island transport simulator (MITS) based on semi-classical tunneling theory and kinetic Monte Carlo simulation. The 1D chain is parameterized to model the experimentally-realized devices studied by Lee et al. [Advanced Materials25, 4544-4548 (2013)], which consists of nano-meter-sized gold islands randomly deposited on an insulating boron-nitride nanotube. These devices show semiconductorlike behavior without having semiconductor materials. The effects of disorder, device length, temperature, and source-drain bias voltage (VSD) on the current are examined. Preliminary results of random assemblies of gold nano-islands in two dimensions (2D) are also examined in light of the 1D results.
At T = 0 K and low source-drain bias voltages, the disordered 1D-chain device shows charge-transport characteristics with a well-defined Coulomb blockade (CB) and Coulomb staircase (CS) features that are manifestations of the nanometer size of the islands and their separations. In agreement with experimental observations, the CB and the blockade threshold voltage (Vth) at which the device begins to conduct increases linearly with increasing chain length. The CS structures are more pronounced in longer chains, but disappear at high VSD. Due to tunneling barrier suppression at high bias, the current-voltage characteristics for VSD > Vth follow a non-linear relationship. Smaller islands have a dominant effect on the CB and Vth due to capacitive effects. On the other hand, the wider junctions with their large tunneling resistances predominantly determine the overall device current. This study indicates that smaller islands with smaller inter-island spacings are better suited for practical applications. Temperature has minimal effects on high-bias current behavior, but the CB is diminished as Vth decreases with increasing temperature.
In 2D systems with sufficient disorder, our studies demonstrate the existence of a dominant conducting path (DCP) along which most of the current is conveyed, making the device effectively quasi-1-dimensional. The existence of a DCP is sensitive to the device structure, but can be robust with respect to changes in VSD.