Surfaces and interfaces play a critical role in determining properties and functions of nanomaterials, in many cases dominating bulk properties, owing to the large surface- and interface-area-to-volume ratio. Using Si nanomembranes, a well-controlled two-dimensional single-crystalline semiconductor, as a prototype system, we discuss how surfaces and interfaces influence electrical transport properties at the nanoscale. We show that electronic conduction in Si nanomembranes is not determined by bulk dopants but by the interplay of surface and interface electronic structures with the “bulk” band structure of the thin Si membrane. Additionally, we describe our recent experimental results on the control of highly ordered molecular structures on Si surfaces, which is of intense interest for the integration of ordered organic thin films in silicon-based electronics. This could also potentially lead to the rational design of Si nanostructures with controlled properties through regulation of the surface chemistry.

We report on the fabrication of various high quality GaS nanostructures (angular nanobelts, nanowedges and nanotubes) and In2S3 nanostructures (tapered nanorods, nanobelts and nanowires) by catalyst assisted thermal evaporation process. The morphology and structures of the products were controlled by temperature and position of the substrates with respect to the source material. The morphologies of GaS and In2S3 nanostructures were examined by X-ray diffraction (XRD), scanning electron microscope (SEM), high-resolution transmission electron microscope (HRTEM), and energy dispersive spectroscopy (EDS). The optical and electronic properties of the synthesized materials were investigated in order to obtain a better fundamental understanding of the structure-property relationships in these materials which can be extended to other layered sulfide materials systems.

Dissipative quantum transport simulations using the Non-Equilibrium Green Function Formalism have been carried out to obtain a transfer characteristic of a Si gate-all-around (GAA) nanowire transistor. A donor-type impurity has been located close to the source/channel interface, creating a resonant level. The existence and energy of the resonant level depends on the value of the gate bias. The dependence of the current reduction due to phonon scattering as a function of the gate bias, has a minimum due to the resonant level. The simulations at different temperatures have shown a decline in the sub-threshold slope at high temperature and an improvement at low temperature. Finally, the sub-threshold slope approximate follows the standard linear temperature dependence.