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Single Wafer Amorphous Silicon Process Evaluation

Published online by Cambridge University Press:  15 February 2011

David O'Meara
Affiliation:
APRDL Motorola, 3501 Ed Bluestein Blvd., Austin, Tx. 78721
Chow Ling Chang
Affiliation:
Applied Materials, 9050 Capital of Texas Highway, Austin, Tx, 78759
Roc Blumenthal
Affiliation:
APRDL Motorola, 3501 Ed Bluestein Blvd., Austin, Tx. 78721
Rama I. Hegde
Affiliation:
APRDL Motorola, 3501 Ed Bluestein Blvd., Austin, Tx. 78721
Lata Prabhu
Affiliation:
APRDL Motorola, 3501 Ed Bluestein Blvd., Austin, Tx. 78721
Vidya Kaushik
Affiliation:
APRDL Motorola, 3501 Ed Bluestein Blvd., Austin, Tx. 78721
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Abstract

Single wafer amorphous silicon deposition was characterized through process modeling and film characterization for application in semiconductor production. DOE methodology was used to determine the main deposition parameters, and the responses were limited to device production requirement properties of surface roughness, deposition rate and degree of crystallinity of the as-deposited film. The data trends and models show that deposition temperature and silane flow are the main factors. Increasing either or both factor increases the deposition rate and the surface roughness. The surface morphology, evaluated by AFM, SEM and TEM, was found to be rougher at extreme growth conditions than the poly crystalline film formed after anneal. The as-deposited surface morphology was not a result of pre-anneal crystal formations as determined by TEM cross sections of samples before and after anneal. Lack of crystalinity is important for impurity diffusion considerations. Device application of the single wafer a-Si process will be a compromise between growth rate (and associated throughput) and surface roughness that can be tolerated.

Type
Research Article
Copyright
Copyright © Materials Research Society 1997

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References

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