Hostname: page-component-7c8c6479df-fqc5m Total loading time: 0 Render date: 2024-03-29T08:36:30.760Z Has data issue: false hasContentIssue false

Recent Progress in Downsizing FeFETs for Fe-NAND Application

Published online by Cambridge University Press:  28 June 2011

Le Van Hai
Affiliation:
National Institute of Advanced Industrial Science and Technology, Central 2, 1-1-1 Umezono, Tsukuba, Ibaraki, 305-8568, Japan
Mitsue Takahashi
Affiliation:
National Institute of Advanced Industrial Science and Technology, Central 2, 1-1-1 Umezono, Tsukuba, Ibaraki, 305-8568, Japan
Shigeki Sakai
Affiliation:
National Institute of Advanced Industrial Science and Technology, Central 2, 1-1-1 Umezono, Tsukuba, Ibaraki, 305-8568, Japan
Get access

Abstract

Sub-micrometer ferroelectric-gate field-effect transistors (FeFETs) of 0.56 μm and 0.50 μm gate lengths were successfully fabricated for Fe-NAND cells. Gate stacks of the FeFETs were Pt/SrBi2Ta2O9(SBT)/Hf-Al-O/Si. The gate stacks were formed by electron beam lithography and inductively coupled plasma reactive ion etching (ICP-RIE). Ti and SiO2 hard masks were used for the 0.56 μm- and 0.50 μm-gate FeFETs, respectively, in the ICP-RIE process. Steep SBT sidewalls with the angle of 85° were obtained by using the SiO2 hard masks while 76° sidewalls were shown using Ti hard masks. All fabricated FeFETs showed good electrical characteristics. Drain current hysteresis showed larger memory windows than 0.95 V when the gate voltages were swung between 1±5 V. The FeFETs showed stable endurance behaviors over 108 program/erase cycles. Drain current retention properties of the FeFETs were good so that the drain current on/off ratios did not show practical changes after 3 days.

Type
Research Article
Copyright
Copyright © Materials Research Society 2011

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Lai, S., IEEE IEDM Techn. Dig., pp.255258 (2003).Google Scholar
2. Tarui, Y., Hirai, T., Teramoto, K., Koike, H. and Nagashima, K., Appl. Surf. Sci. 113, pp.656663 (1997).Google Scholar
3. Higuma, Y., Matsui, Y., Okuyama, M., Nakagawa, T. and Hamakawa, Y., Jpn. J. Appl. Phys. 17 Suppl. 17–1, pp.209-214 (1978).Google Scholar
4. Scott, J. F., Ferroelectric Memories, (Springer, 2000) chapter 12.Google Scholar
5. AIST press release, “Development of the 1T FeRAM: Towards the Realization of the Ultra-Gbit Next-Generation Semiconductor Memory,” Oct 24, 2002.Google Scholar
6. Sakai, S., Takahashi, M., Takeuchi, K., Li, Q.-H., Horiuchi, T., Wang, S., Yun, K.-Y., Takamiya, M. and Sakurai, T., Proc. of the 23rd IEEE Non-Volatile Semiconductor Memory Workshop and 3rd International Conf. on Memory Technology and Design, pp 103105 (2008).Google Scholar
7. Sakai, S., US patent 7,226,795 (2005).Google Scholar
8. Sakai, S. and Ilangovan, R., IEEE Electron. Devices Lett. 25, pp.369371 (2004).Google Scholar
9. Sakai, S., Takahashi, M. and Ilangovan, R., IEEE IEDM Tech. Dig., pp.915918 (2004).Google Scholar
10. Sakai, S., Takahashi, M. and Ilangovan, R., Jpn. J. Appl. Phys. 43, pp.78767878 (2004).Google Scholar
11. Aizawa, K., Park, B.-E., Kawashima, Y., Takahashi, K. and Ishiwara, H., Appl. Phys. Lett. 85, pp.31993201 (2004).Google Scholar
12. Shim, S.I., Kwon, Y.S., Kim, S.-I., Kim, Y.T. and Park, J.H., physica status solidi (a) 201, pp. R65R68 (2004).Google Scholar
13. Shim, S.I., Kwon, Y.S., Kim, S.I., Kim, Y.T. and Park, J.H., J. Vac. Sci. Technol. A 22, pp.15591563 (2004).Google Scholar
14. Takahashi, M. and Sakai, S., Jpn. J. Appl. Phys. 44, L800L802 (2005).Google Scholar
15. Li, Q.-H. and Sakai, S., Appl. Phys. Lett., 89, 222910 (2006).Google Scholar
16. Lu, X.-B., Maruyama, K. and Ishiwara, H., Semicond. Sci. Technol. 23, 045002 (2008).Google Scholar
17. Horiuchi, T., Takahashi, M., Li, Q.-H., Wang, S. and Sakai, S., Semicond. Sci. Technol. 25, 055005 (2010).Google Scholar
18. Hai, L. V., Takahashi, M. and Sakai, S., Semicond. Sci. Technol. 25, 115013 (2010).Google Scholar
19. Wang, S., Takahashi, M., Li, Q.-H, Takeuchi, K. and Sakai, S., Semicond. Sci. Technol. 24, 105029 (2009).Google Scholar
20. Hatanaka, T., Yajima, R., Horiuchi, T., Wang, S., Zhang, X., Takahashi, M., Sakai, S. and Takeuchi, K., IEEE Symp. VLSI Circuits Dig. of Tech. Papers, pp.7879 (2009).Google Scholar
21. Sakai, S. and Takahashi, M., Materials 3, pp.49504964 (2010).Google Scholar
22. Sakai, S., Takahashi, M., Motohashi, K., Yamaguchi, Y., Yui, N. and Kobayashi, T., J. Vac. Sci. Technol. A 25, pp.903907 (2007).Google Scholar