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MBE Growth of GaAs on Porous Silicon

Published online by Cambridge University Press:  28 February 2011

T. L. Lin
Affiliation:
Department of Electrical Engineering, University of California, Los Angeles, CA
L. Sadwick
Affiliation:
Department of Electrical Engineering, University of California, Los Angeles, CA
K. L. Wang
Affiliation:
Department of Electrical Engineering, University of California, Los Angeles, CA
S. S. Rhee
Affiliation:
Department of Electrical Engineering, University of California, Los Angeles, CA
Y. C Kao
Affiliation:
Department of Electrical Engineering, University of California, Los Angeles, CA
R. Hull
Affiliation:
Hewlett Packard Research Laboratory, Palo Alto, CA
C.W. Nieh
Affiliation:
California Institute of Technology, Pasadena, CA
D. N. Jamieson
Affiliation:
California Institute of Technology, Pasadena, CA
J. K. Liu
Affiliation:
Jet Propulsion Laboratory, Pasadena, CA.
M-A. Nicolet
Affiliation:
California Institute of Technology, Pasadena, CA
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Abstract

GaAs layers have been grown on porous silicon (PS) substrates by molecular beam epitaxyNo surface morphology deterioration was observed onGaAs-on-PS layers in spite of the roughness of PS. A 10% Rutherford backscattering spectroscopy (RBS) channeling minimum yield for GaAs-on-PS layers as compared to 16% for GaAs-on-Si layers grown under the same condition indicates a possible improvement of crystallinity when GaAs is grown on PS. Transmission electron microscopy (TEM) reveals that the dominant defects in the GaAs-on-PS layers are microtwins and stacking faults, which originate from the GaAs/PS interface. GaAs is found to penetrate into the PS layers.

Type
Research Article
Copyright
Copyright © Materials Research Society 1987

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