Hostname: page-component-84b7d79bbc-7nlkj Total loading time: 0 Render date: 2024-07-25T09:24:48.783Z Has data issue: false hasContentIssue false
  • English
  • Français

Low K Sog Etchback and Teos Oxide Capping

Published online by Cambridge University Press:  15 February 2011

K.G. Huang ,
D. Cheung ,
D. Nguyen  and
L. Forester
K.G. Huang
Affiliation:
Applied Materials, Inc., M/S 1266, 3225 Oakmead Village Drive, Santa Clara, CA 95054
D. Cheung
Affiliation:
Applied Materials, Inc., M/S 1266, 3225 Oakmead Village Drive, Santa Clara, CA 95054
D. Nguyen
Affiliation:
Allied Signal, Inc., Advanced Microelectronic Materials, 3500 Garrett Drive, Santa Clara, CA 95054
L. Forester
Affiliation:
Allied Signal, Inc., Advanced Microelectronic Materials, 3500 Garrett Drive, Santa Clara, CA 95054
Get access

Abstract

SOG etchback was studied using Applied Materials' 200mm MxP+ etch chamber on Allied Signal's SOG (spin-on-glass) T11 and low κ SOP (spin-on-polymer) 418 together with liner films of PE-oxide and oxynitride for IMD (inter-metal dielectric) planarization. Excellent chamber performance and wide process window were demonstrated. Etch selectivities between various SOG and liner films are tunable in a wide range allowing optimization of IMD planarization.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 476: Symposium N – Low-Dielectric Constant Materials III , 1997 , 45
Copyright
Copyright © Materials Research Society 1997

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Proceedings of Second International Dielectric for VLSI/ULSI Multilevel Interconnection Conference (DUMIC), 96ISMIC-111D, Santa Clara, CA (1996).Google Scholar
2. Huang, K.G., Rathi, S., Guo, X., Gupta, A., Cheung, D., Chanda, R., Sheen, D.S., Kim, M.J., Kim, S.O., Sohn, Y.S., Kim, C.T., Nguyen, D., Foreste, L., Proceedings of Third International Dielectrics for ULSI Multilevel Interconnection Conference (DUMIO), 97ISMIC-222D, pp.371–378, Santa Clara, CA (1997).Google Scholar
3. Guo, X., Ching, C., Huang, K.G., Latchford, I., Proceedings of SEMICON Beijing, China (1996).Google Scholar
4. Wang, David N.K., in Multichamber and In Situ Processing of Electronic Materials, SPIE Proc., 1188, Santa Clara, CA (1989).Google Scholar