Hostname: page-component-76fb5796d-45l2p Total loading time: 0 Render date: 2024-04-25T13:11:16.148Z Has data issue: false hasContentIssue false
  • English
  • Français

Effects of Process Conditions on the Performance of Large Grain Poly-Silicon on Insulator (LPSOI) MOSFET for Advanced CMOS Applications

Published online by Cambridge University Press:  15 March 2011

S. Shivani ,
K. L. Ng ,
C. F. Cheng ,
M. C. Poon  and
Mansun Chan
S. Shivani
Affiliation:
Department of Electrical and Electronic Engineering, Hong Kong University of Science & Technology, Sai Kung, Hong Kong
K. L. Ng
Affiliation:
Department of Electrical and Electronic Engineering, Hong Kong University of Science & Technology, Sai Kung, Hong Kong
C. F. Cheng
Affiliation:
Department of Electrical and Electronic Engineering, Hong Kong University of Science & Technology, Sai Kung, Hong Kong
M. C. Poon
Affiliation:
Department of Electrical and Electronic Engineering, Hong Kong University of Science & Technology, Sai Kung, Hong Kong
Mansun Chan
Affiliation:
Department of Electrical and Electronic Engineering, Hong Kong University of Science & Technology, Sai Kung, Hong Kong
Get access

Abstract

Effects of process annealing temperature on Metal-Induced-Lateral-Crystallization (MILC) growth rate and quality of MILC polysilicon formed were studied. Raman spectrum analysis was employed for material characterization. MILC polysilicon layer, which was formed by applying an optimum annealing condition together with post high temperature annealing, could be used to fabricate Thin-Film-Transistor (TFT) with considerably electrical improvements. This reflected that good quality of the polysilicon layer. It is believed that the proposed MILC formation method can be empolyed to produce large grain polysilicon on insulator (LPSOI) for advanced devices and circuits' fabrication.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 686: Symposium A – Materials Issues in Novel Si-Based Technology , 2001 , A4.3
Copyright
Copyright © Materials Research Society 2002

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

1. Wang, Hongmei, Chan, Mansun, Jagar, Singh, Poon, M. C., Qin, Ming and Wang, Yangyuan, “High Performance Single Grain Thin Film Transistor (TFT) formed by Metal Induced Lateral Crystallization”, TED, August 1999.Google Scholar
2. Jagar, Singh, Chan, Mansun, Poon, M.C., Wang, Hongmei, Qin, Ming, Ko, Ping K., Wang, Yangyuan, “Single Grain Thin Film Transistor (TFT) with SOI Performance formed by Metal Induced Lateral Crystallization”, 1999 IEDM Digest.Google Scholar
3. Jin, Z., Bhat, G. A., Yeung, M., Kwok, H. S. and Wong, M., “Nickel induced crystallization of amorphous silicon thin films”, Journal of Applied Physics, Vol. 84, No. 1, pp. 194–200, 1998.Google Scholar
4. Subramanian, V. and Saraswat, K. C., “High performance germanium seeded laterally crystallized TFT's for vertically device integration”, IEEE Trans. Elec. Dev., vol-45, no.9, p.1934–1939, 1998.Google Scholar
5. Lee, S. W., Joo, S. K., “Low temperature poly-Si thin-film-transistor fabricated by metal-induced lateral crystallization”, IEEE Electron Device Letters, Vol. 17, No. 4, pp. 160–162, 1996.Google Scholar