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Device Application and Growth Mechanism for Hemispherical-Grained Si.

Published online by Cambridge University Press:  21 February 2011

Hirohito Watanabe
Affiliation:
Microelectronics Research Laboratories, NEC Corp., 1129 Shimokuzawa, Sagamihara, Kanagawa 229, Japan
Nahomi Aoto
Affiliation:
Microelectronics Research Laboratories, NEC Corp., 1129 Shimokuzawa, Sagamihara, Kanagawa 229, Japan
Saburo Adachi
Affiliation:
Microelectronics Research Laboratories, NEC Corp., 1129 Shimokuzawa, Sagamihara, Kanagawa 229, Japan
Takamaro Kikkawa
Affiliation:
Microelectronics Research Laboratories, NEC Corp., 1129 Shimokuzawa, Sagamihara, Kanagawa 229, Japan
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Abstract

A polycrystalline-silicon surface with hemispherical-grain (HSG) is deposited by low-pressure chemical vapor deposition at the transition temperature of the film structure from amorphous to polycrystalline. The surface area of the HSG-Si film is about twice as large as Si films deposited at other temperatures. It is found that the HSG-Si is not formed during deposition, but formed during annealing of amorphous Si surface after deposition. At the annealing temperature which is maintained to be the transition temperature, HSG-Si is formed by the nuclei generation on the amorphous-Si surface and the outward crystalline growth of grains dixough migration of surface Si atoms. By applying the HSG-Si film as the storage electrode for a 64Mbit dynamic random access memory (DRAM) stacked-capacitor with a SiO2Si3N4 dielectric film, twice the capacitance is obtained. The increase in the capacitance makes it possible to reduce the DRAM cell area, even by using a relatively thick dielectric film for higher reliability. Consequently, the HSG-Si technique is applicable to the fabrication process for 64Mbit and larger DRAMs.

Type
Research Article
Copyright
Copyright © Materials Research Society 1991

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References

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