Hostname: page-component-8448b6f56d-dnltx Total loading time: 0 Render date: 2024-04-20T02:41:01.349Z Has data issue: false hasContentIssue false
  • English
  • Français

Development of Spin-on Pre Metal Dielectrics (PMD) for 0.10UM Design Rule and Beyond

Published online by Cambridge University Press:  01 February 2011

Zhongtao Li ,
Xiaobing Zhou ,
Dave Wyman ,
Mike Spaulding ,
Ginam Kim ,
Stelian Grigoras ,
DK Choi  and
Eric Moyer
Zhongtao Li
Affiliation:
Semiconductor Fabrication Materials, Dow Corning Corp., Midland, MI 48686, U.S.A.
Xiaobing Zhou
Affiliation:
Semiconductor Fabrication Materials, Dow Corning Corp., Midland, MI 48686, U.S.A.
Dave Wyman
Affiliation:
Semiconductor Fabrication Materials, Dow Corning Corp., Midland, MI 48686, U.S.A.
Mike Spaulding
Affiliation:
Semiconductor Fabrication Materials, Dow Corning Corp., Midland, MI 48686, U.S.A.
Ginam Kim
Affiliation:
Semiconductor Fabrication Materials, Dow Corning Corp., Midland, MI 48686, U.S.A.
Stelian Grigoras
Affiliation:
Semiconductor Fabrication Materials, Dow Corning Corp., Midland, MI 48686, U.S.A.
DK Choi
Affiliation:
Semiconductor Fabrication Materials, Dow Corning Corp., Midland, MI 48686, U.S.A.
Eric Moyer
Affiliation:
Semiconductor Fabrication Materials, Dow Corning Corp., Midland, MI 48686, U.S.A.
Get access

Abstract

Spin-on pre metal dielectric (PMD) materials are being developed for memory and logic devices at 0.10 um design rules and beyond. The stringent design rules require a PMD material with a low thermal budget, excellent gap fill capability, and etch resistance similar to that of a thermal oxide. Spin-on PMD is being developed to meet these requirements as current PMD technologies of HDP CVD and BPSG reflow are constrained by void formation or high thermal budget requirement. One common challenge that faces spin-on PMD is inhomogeneous densification, or “corner etch”. In this paper EELS-STEM, FTIR, SEM and HF wet etching were used to study the mechanism of this phenomenon. This information provides a possible route for the development of spin-on PMD resins.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 716: Symposium B – Silicon Materials-Processing, Characterization, and Reliability , 2002 , B7.10
Copyright
Copyright © Materials Research Society 2002

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

[1] International Technology Roadmap for Semiconductor, http://public.itrs.net, Santa Clara, CA, November, 29, 2001.Google Scholar
[2] Nag, S. Ramamurthy, R. Lei, W.J. Monteil, C. Hickey, Mark, Solid State Technology, September 1998.Google Scholar
[3] Seo, Y.J. Kim, S.Y. and Lee, W.S. Journal of materials science: materials in electronics, 12 (2001) 551–554.Google Scholar
[4] Yu, J. Gopalan, P. and Feng, J. IITC (1999), 35–37.Google Scholar
[5] Quan, L.Q. S.Botha, Lin, X.W. Harley, I. Weling, M. and Pramanik, D. Proceedings of the 14th International VLSI Multilevel Interconnection Conference, (1997), p. 166.Google Scholar
[6] Vassiliev, V. Y. Lin, C. Fung, D. Hsieh, J. and Sudijono, J. L. Electrochemical and Solid-State Letters, 3 (2), (2000), 80–83 Google Scholar
[7] Goo, J.S. Hong, E.K. Kim, H.G. Kim, H.J. Baek, E.K. Park, S.H. Lee, J.B. Lee, H.D. Kang, H.K. Moon, J.T. IEDM (2001),Google Scholar
[8] Hwang, B.K. Choi, J.H. Lee, H.J. Goo, J.S. Chung, U.I. and Lee, M.Y. VMIC conference (1996), 623–625.Google Scholar
[9] Lee, H.J. Choi, J.H. Hwang, B.K. Goo, J.S. Fujihara, K. Chung, U.I. Kim, K.H. Lee, S.I. and Lee, M.Y. Symposium on VLSI Technology Digest of Technical papers, (1996), 112–113.Google Scholar