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Improvement in Gate Dielectric Quality of Ultra Thin a: SiN:H MNS Capacitor by Hydrogen Etching of the Substrate

Published online by Cambridge University Press:  01 February 2011

Parag C. Waghmare
Affiliation:
Department of Metallurgical Engineering and Materials Science
Samadhan B. Patil
Affiliation:
Department of Metallurgical Engineering and Materials Science
Rajiv O. Dusane
Affiliation:
Department of Metallurgical Engineering and Materials Science
V.Ramgopal Rao
Affiliation:
Department of Electrical Engineering Indian Institute of Technology, Bombay Powai, Mumbai 400 076, India
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Abstract

To extend the scaling limit of thermal SiO2, in the ultra thin regime when the direct tunneling current becomes significant, members of our group embarked on a program to explore the potential of silicon nitride as an alternative gate dielectric. Silicon nitride can be deposited using several CVD methods and its properties significantly depend on the method of deposition. Although these CVD methods can give good physical properties, the electrical properties of devices made with CVD silicon nitride show very poor performance related to very poor interface, poor stability, presence of large quantity of bulk traps and high gate leakage current. We have employed the rather newly developed Hot Wire Chemical Vapor Deposition (HWCVD) technique to develop the a:SiN:H material. From the results of large number of optimization experiments we propose the atomic hydrogen of the substrate surface prior to deposition to improve the quality of gate dielectric. Our preliminary results of these efforts show a five times improvement in the fixed charges and interface state density.

Type
Research Article
Copyright
Copyright © Materials Research Society 2002

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References

1. Schubegraf, K.f., King, C.C. and Hu, C., Symp. Of VLSI technology, 1992, P.18 Google Scholar
2. Ma, T.P., IEEE TED, Vol. 45, 1998.Google Scholar
3. Khare, Mukesh V., Ph.D. thesis, Yale University, May 1999.Google Scholar
4. Fujita, S., Ohishi, T., Toyoshima, T. and Sasaki, A., Journal of Applied Physics,Vol 57, No. 2,1985, P.426 Google Scholar
5. Mohapatra, Nihar R., Desai, Madhav P., Narendra, Siva G., Rao, V. Ramgopal, Accepted IEEE Transactions on Electron Devices, To appear in May 2002.Google Scholar
6. Mohapatra, Nihar R., Desai, Madhav P., Narendra, Siva G., Rao, V. Ramgopal Proceedings of the 31st European Solid State Device Research Conference (ESSDERC), 1113 September 2001, Nuremberg, Germany Google Scholar
7. Mohapatra, S., Rao, V. Ramgopal, Cheng, B., Khare, M., Parikh, C.D., Woo, J.C.S. and Vasi, J.,IEEE Transactions on Electron Devices,Vol 48, (no.4), April 2001, p 679–84Google Scholar
8. Mohapatra, Souvik., Rao, V.R.,Manjularani, K.N.,Parikh, C.D.,Vasi, J.,Cheng, B.,Khare, M. and Woo, J.C.S., Technical Digest, 1999 Symposium on VLSI Technology,June 14-19, Kyoto, Japan.Google Scholar
9. Stannowski, B., Vanderwerf, C.H.M. and Schropp, R.E.I.,Proceedings of 3rd International Conference on Coatings on Glass, Oct 29- Nov 2, 2000, Maastrichut Google Scholar