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The First Wafer-fused AlGaAs-GaAs-GaN Heterojunction Bipolar Transistor

Published online by Cambridge University Press:  11 February 2011

Sarah Estrada
Affiliation:
Departments of Materials and Electrical & Computer Engineering, University of California, Santa Barbara, California 93106–5050
Andreas Stonas
Affiliation:
Departments of Materials and Electrical & Computer Engineering, University of California, Santa Barbara, California 93106–5050
Andrew Huntington
Affiliation:
Departments of Materials and Electrical & Computer Engineering, University of California, Santa Barbara, California 93106–5050
Huili Xing
Affiliation:
Departments of Materials and Electrical & Computer Engineering, University of California, Santa Barbara, California 93106–5050
Larry Coldren
Affiliation:
Departments of Materials and Electrical & Computer Engineering, University of California, Santa Barbara, California 93106–5050
Steven DenBaars
Affiliation:
Departments of Materials and Electrical & Computer Engineering, University of California, Santa Barbara, California 93106–5050
Umesh Mishra
Affiliation:
Departments of Materials and Electrical & Computer Engineering, University of California, Santa Barbara, California 93106–5050
Evelyn Hu
Affiliation:
Departments of Materials and Electrical & Computer Engineering, University of California, Santa Barbara, California 93106–5050
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Abstract

We describe the use of wafer fusion to form a heterojunction bipolar transistor (HBT), with an AlGaAs-GaAs emitter-base fused to a GaN collector. In this way, we hope to make use of both the high breakdown voltage of the GaN and the high mobility of the technologically more mature GaAs-based materials. This paper reports the first dc device characteristics of a wafer-fused transistor, and demonstrates the potential of wafer fusion for forming electronically active, lattice-mismatched heterojunctions. Devices utilized a thick base (0.15um) and exhibited limited common-emitter current gain (0.2–0.5) at an output current density of ∼100A/cm2. Devices were operated to VCE greater than 20V, with a low VCE offset (1V). Improvements in both device structure and wafer fusion conditions should provide further improvements in HBT performance. The HBT was wafer-fused at 750°C for one hour. Current-voltage characteristics of wafer-fused p-GaAs/n-GaN diodes suggest that the fusion temperature could be reduced to 500°C. Such a reduction in process temperature should mitigate detrimental diffusion effects in future HBTs.

Type
Research Article
Copyright
Copyright © Materials Research Society 2003

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References

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