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Effects of the Ultra Low Diluted Ceria-Based Slurry on the Planarization Characteristics of Multi-Layer Exposed Surfaces

Published online by Cambridge University Press:  01 February 2011

Kyung Ho Hwang
Affiliation:
kyungho.hwang@hynix.com, Hynix Semiconductor Inc., R & D Division, Ami-ri Bubal-eub, Icheon-si, Kyoungki-do, 467-701, Korea, Republic of
Jae Gon Choi
Affiliation:
Jaegon.choi@hynix.com, Hynix Semiconductor Inc., R & D Division, Ami-ri Bubal-eub, Icheon-si, Kyoungki-do, 467-701, Korea, Republic of
Myung Shin Lee
Affiliation:
Myungshin.Lee@hynix.com, Hynix Semiconductor Inc., R & D Division, Ami-ri Bubal-eub, Icheon-si, Kyoungki-do, 467-701, Korea, Republic of
Yong Soo Choi
Affiliation:
Yongsoo.choi@hynix.com, Hynix Semiconductor Inc., R & D Division, Ami-ri Bubal-eub, Icheon-si, Kyoungki-do, 467-701, Korea, Republic of
Geun Min Choi
Affiliation:
Geunmin.choi@hynix.com, Hynix Semiconductor Inc., R & D Division, Ami-ri Bubal-eub, Icheon-si, Kyoungki-do, 467-701, Korea, Republic of
Yong Wook Song
Affiliation:
Yongwook.song@hynix.com, Hynix Semiconductor Inc., R & D Division, Ami-ri Bubal-eub, Icheon-si, Kyoungki-do, 467-701, Korea, Republic of
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Abstract

Planarization characteristics of ultra low diluted Ceria (CeO2) based slurry, especially a multi-layered Chemical Mechanical Polishing (CMP) process, have been studied. The multi-layer represents the polished film consists of more than two different materials, so that, more than two different materials are exposed to the polished surface. In this work, ultra low diluted ceria based slurry was introduced to minimize micro-dishing effect of the process such as a storage node contact and a bit line contact in 80nm feature sized DRAM device, which has multi-layer film surfaces. As a result, we can minimize micro dishing of silicon dioxide and polycrystalline silicon at memory cell area, and silicon dioxide dishing at peripheral area.

Type
Research Article
Copyright
Copyright © Materials Research Society 2006

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References

[1] Cook, L.M., J. Non-Cryst. Solids, 120, 152 (1990).CrossRefGoogle Scholar
[2] Hoshino, T., Kurata, Y., Terasaki, Y., and Susa, K., J. Non-Cryst. Solids, 283, 129 (2001).CrossRefGoogle Scholar
[3] Oliver, M.R.. Chemical Mechanical Planarization of Semiconductor Materials (Springer-Verlag Berlin Heidelberg 2004) p. 286 CrossRefGoogle Scholar
[4] Yang, W.L., Cheung, C.Y., Tsai, M.S., Lie, D.G., and Shieh, M.S., IEEE ELECTRON DEVICE LETTER, VOL.21, NO.5 MAY (2000).Google Scholar
[5] Yasseen, A.A., Mourlas, N.J., and Mehregany, M.. J. Electrochem. Soc., Vo. 144, No.1 JAN 1997.CrossRefGoogle Scholar

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Effects of the Ultra Low Diluted Ceria-Based Slurry on the Planarization Characteristics of Multi-Layer Exposed Surfaces
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