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Effects of Temperature and Electrical Stress on the Characteristics of Amorphous Silicon Thin-Film Transistors

Published online by Cambridge University Press:  21 February 2011

Jin S. Park
Affiliation:
Seoul Nat'l. Univ., Dept. of Electrical Eng., Kwanak-Ku, Seoul 151–742, Korea
Chang H. Oh
Affiliation:
GoldStar Co., LTD., R&D Complex, An—Yang 430–080, Korea
Hong S. Choi
Affiliation:
GoldStar Co., LTD., R&D Complex, An—Yang 430–080, Korea
Min K. Han
Affiliation:
GoldStar Co., LTD., R&D Complex, An—Yang 430–080, Korea
Yearn I. Choi
Affiliation:
Ajou Univ., Dept. of Electronics Eng., Suwon 440–749, Korea
Chul H. Han
Affiliation:
KAIST, Dept. of Electrical Eng‥ Daejeon 304–350., Korea
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Abstract

The experimental and analytical results regarding to the effects of temperature and electrical stress on the characteristics of amorphous silicon thin-film transistors (a-Si TFT's) have been presented. The variations in the device parameters of a-Si TFT, such as threshold voltage and field-effect mobility, have been examined under various operating temperatures and electrical stress conditions. The hysteresis in the transfer characteristics and the trapped charges at the a-Si/silicon nitride interface were measured at the operating temperature ranges. From the experimental results, it has been found out that the increase of the interface charge trapping may be responsible for the degradation in the a-Si TFT characteristics. Also, an analytical formulation, employing the interface charge trapping, is presented to clarify the instability phenomena and verified successfully with the experimental results.

Type
Research Article
Copyright
Copyright © Materials Research Society 1991

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References

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