Skip to main content Accessibility help
×
Home
Hostname: page-component-5cfd469876-kqxn7 Total loading time: 0.266 Render date: 2021-06-24T08:11:25.944Z Has data issue: true Feature Flags: { "shouldUseShareProductTool": true, "shouldUseHypothesis": true, "isUnsiloEnabled": true, "metricsAbstractViews": false, "figures": true, "newCiteModal": false, "newCitedByModal": true, "newEcommerce": true }

Effective Dielectric Thickness Scaling for High-K Gate Dielectric Mosfets

Published online by Cambridge University Press:  01 February 2011

Krishna Kumar Bhuwalka
Affiliation:
Electrical Engineering Department Indian Institute of Technology, Bombay 400 076, India.
Nihar R. Mohapatra
Affiliation:
Electrical Engineering Department Indian Institute of Technology, Bombay 400 076, India.
Siva G. Narendra
Affiliation:
Electrical Engineering Department Indian Institute of Technology, Bombay 400 076, India.
V Ramgopal Rao
Affiliation:
Electrical Engineering Department Indian Institute of Technology, Bombay 400 076, India.
Get access

Abstract

It has been shown recently that the short channel performance worsens for high-K dielectric MOSFETs as the physical thickness to the channel length ratio increases, even when the effective oxide thickness (EOT) is kept identical to that of SiO2. In this work we have systematically evaluated the effective dielectric thickness for different Kgate to achieve targeted threshold voltage (Vt), drain-induced barrier lowering (DIBL) and Ion/Ioff ratio for different technology generations down to 50 nm using 2-Dimensional process and device simulations. Our results clearly show that the oxide thickness scaling for high-K gate dielectrics and SiO2 follow different trends and the fringing field effects must be taken into account for estimation of effective dielectric thickness when SiO2 is replaced by a high-K dielectric.

Type
Research Article
Copyright
Copyright © Materials Research Society 2002

Access options

Get access to the full version of this content by using one of the access options below.

References

1. Taur, Y., Mii, Y. J., Frank, D. J., Wong, H. S., Buchanan, D. A., Wind, S. J., Rishton, S. A., Sai-Halasz, G. A. and Nowak, E. J., “CMOS scaling into the 21st century: 0.1μm and beyond”, IBM Journal of Research and Development, Vol. 39, No. 12, 1995.CrossRefGoogle Scholar
2. Cheng, B., Cho, M., Rao, V. R., Inani, A., Voorde, P. V., Greene, W. M., Stork, J. M. C., Yu, Z., Zeitzoff, P. M. and Woo, J. C. S., “The Impact of High-K gate dielectrics and metal gate electrodes on sub-100nm MOSFETs”, IEEE Transactions on Electron Devices, Vol. 46, No. 7, P. 1537, 1999.CrossRefGoogle Scholar
3. Mohapatra, Nihar R., Dutta, Arijit, Desai, Madhav P. and Rao, V. Ramgopal, “Fringing induced degradation in deep sub-micron MOSFETs with high-K gate dielectrics”. Proceedings of 14th International Conference on VLSI Design, P. 479, Jan 2001.Google Scholar
4. Mohapatra, Nihar R., Desai, Madhav P., Narendra, Siva G. and Rao, V. Ramgopal, “The Effect of High-K Gate Dielectric on Deep Sub-Micrometer Device and Circuit Performance” To be published, IEEE Transaction on Electron Devices, May 2002.CrossRefGoogle Scholar
5. ISE TCAD User's Manual-Release 6(1, 3, 4, 5), Integrated Systems Engineering AG, Technoparkstrasse 1, CH-8005 Zurich / Switzerland.Google Scholar
6.The National Technology Raodmap for Semiconductors published by the Semiconductor Industry Association (1997).Google Scholar

Send article to Kindle

To send this article to your Kindle, first ensure no-reply@cambridge.org is added to your Approved Personal Document E-mail List under your Personal Document Settings on the Manage Your Content and Devices page of your Amazon account. Then enter the ‘name’ part of your Kindle email address below. Find out more about sending to your Kindle. Find out more about sending to your Kindle.

Note you can select to send to either the @free.kindle.com or @kindle.com variations. ‘@free.kindle.com’ emails are free but can only be sent to your device when it is connected to wi-fi. ‘@kindle.com’ emails can be delivered even when you are not connected to wi-fi, but note that service fees apply.

Find out more about the Kindle Personal Document Service.

Effective Dielectric Thickness Scaling for High-K Gate Dielectric Mosfets
Available formats
×

Send article to Dropbox

To send this article to your Dropbox account, please select one or more formats and confirm that you agree to abide by our usage policies. If this is the first time you use this feature, you will be asked to authorise Cambridge Core to connect with your <service> account. Find out more about sending content to Dropbox.

Effective Dielectric Thickness Scaling for High-K Gate Dielectric Mosfets
Available formats
×

Send article to Google Drive

To send this article to your Google Drive account, please select one or more formats and confirm that you agree to abide by our usage policies. If this is the first time you use this feature, you will be asked to authorise Cambridge Core to connect with your <service> account. Find out more about sending content to Google Drive.

Effective Dielectric Thickness Scaling for High-K Gate Dielectric Mosfets
Available formats
×
×

Reply to: Submit a response

Please enter your response.

Your details

Please enter a valid email address.

Conflicting interests

Do you have any conflicting interests? *