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Double-Ion-Implanted GaN MESFETs with Extremely Low Source/Drain Resistance

Published online by Cambridge University Press:  01 February 2011

Kazuki Nomoto
Affiliation:
i04r3233@k.hosei.ac.jp, HOSEI UNIV., EECE, 3-7-2 Kajinocho, Koganei, Tokyo, 184-8584, Japan, +81-42-387-5104, +81-42-387-6095
Nobuyuki Ito
Affiliation:
i04r3205@k.hosei.ac.jp, HOSEI UNIV., EECE, Japan
Taku Tajima
Affiliation:
i05r3229@k.hosei.ac.jp, HOSEI UNIV., EECE, Japan
Takeshi Kasai
Affiliation:
i04r3233@k.hosei.ac.jp, Chemitronics, Japan
Tomoyoshi Mishima
Affiliation:
i04r3233@k.hosei.ac.jp, Hitachi Cable, Japan
Taroh Inada
Affiliation:
i04r3233@k.hosei.ac.jp, HOSEI UNIV., EECE, Japan
Masataka Satoh
Affiliation:
mah@ionbeam.hosei.ac.jp, HOSEI UNIV., EECE, Japan
Tohru Nakamura
Affiliation:
tohru@k.hosei.ac.jp, HOSEI UNIV., EECE, Japan
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Abstract

Incorporation of Si ion implantation to GaN metal semiconductor field effect transistor (MESFET) processing has been demonstrated. The channel and source/drain regions formed using Si ion implantation into undoped GaN on sapphire substrate. In comparison with the conventional devices without ion implanted source/drain structures, the ion implanted devices showed excellent device performance. On-state resistance reduces from 210 Ω-mm to 105 Ω-mm. Saturation drain current and maximum transconductance increase from 36 mA/mm to 78 mA/mm and from 3.8 mS/mm to 10 mS/mm, respectively.

Type
Research Article
Copyright
Copyright © Materials Research Society 2006

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References

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