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Double-Ion-Implanted GaN MESFETs with Extremely Low Source/Drain Resistance

Published online by Cambridge University Press:  01 February 2011

Kazuki Nomoto ,
Nobuyuki Ito ,
Taku Tajima ,
Takeshi Kasai ,
Tomoyoshi Mishima ,
Taroh Inada ,
Masataka Satoh  and
Tohru Nakamura
Kazuki Nomoto
Affiliation:
i04r3233@k.hosei.ac.jp, HOSEI UNIV., EECE, 3-7-2 Kajinocho, Koganei, Tokyo, 184-8584, Japan, +81-42-387-5104, +81-42-387-6095
Nobuyuki Ito
Affiliation:
i04r3205@k.hosei.ac.jp, HOSEI UNIV., EECE, Japan
Taku Tajima
Affiliation:
i05r3229@k.hosei.ac.jp, HOSEI UNIV., EECE, Japan
Takeshi Kasai
Affiliation:
i04r3233@k.hosei.ac.jp, Chemitronics, Japan
Tomoyoshi Mishima
Affiliation:
i04r3233@k.hosei.ac.jp, Hitachi Cable, Japan
Taroh Inada
Affiliation:
i04r3233@k.hosei.ac.jp, HOSEI UNIV., EECE, Japan
Masataka Satoh
Affiliation:
mah@ionbeam.hosei.ac.jp, HOSEI UNIV., EECE, Japan
Tohru Nakamura
Affiliation:
tohru@k.hosei.ac.jp, HOSEI UNIV., EECE, Japan
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Abstract

Incorporation of Si ion implantation to GaN metal semiconductor field effect transistor (MESFET) processing has been demonstrated. The channel and source/drain regions formed using Si ion implantation into undoped GaN on sapphire substrate. In comparison with the conventional devices without ion implanted source/drain structures, the ion implanted devices showed excellent device performance. On-state resistance reduces from 210 Ω-mm to 105 Ω-mm. Saturation drain current and maximum transconductance increase from 36 mA/mm to 78 mA/mm and from 3.8 mS/mm to 10 mS/mm, respectively.

Keywords

III-Vion-implantationdevices
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 892 , 2005 , 0892-FF13-06
Copyright
Copyright © Materials Research Society 2006

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References

REFERENCES

1. Yu, Haijiang, McCarthy, L., Rajan, S., Keller, S., Denbaars, S., Speck, J., and Mishra, U., “Ion Implanted AlGaN-GaN HEMTs With Nonalloyed Ohmic Contacts”, IEEE Electron Device Letters, Vol. 26, No. 5, pp. 283–285 (2005).Google Scholar
2. Wang, Wen-Kai, Lin, Po-Chen, Lin, Ching-Huao, Lin, Cheng-Kuo, Chan, Yi-Jen, Chen, Guan-Ting, and Chyi, Jen-Inn, “Performance Enhancement by Using the n+-GaN Cap Layer and Gate Recess Technology on the AlGaN-GaN HEMT Fabrication”, IEEE Electron Device Letters, Vol. 26, No. 1, pp. 5–7 (2005).CrossRefGoogle Scholar
3. Murata, Tomohiro, Hikitra, Masahiro, Hirose, Yutaka, Uemoto, Yasuhiro, Inoue, Kaoru, Tanaka, Tsuyoshi and Ueda, Daisuke, “Source Resistance of AlGaN-GaN HFETs with Novel Superlattice Cap Layer”, IEEE Transaction on Electron Devices, Vol. 52, No. 6, pp. 1042–1047 (2004).CrossRefGoogle Scholar
4. Zolper, J. C., Shul, R. J., Baca, A. G., Wilson, R. G., Pearton, S. J., and Stall, R. A., “Ion-implanted GaN Junction Field Effect Transistor”, Appl. Phys. Lett. Vol. 68(16), 15, pp. 2273–2275 (1996).CrossRefGoogle Scholar
5. Islam, Syed S., Anwar, A.F.M., “Thermal and Trapping Effects in GaN-Based MESFETs”, IEEE Lester Eastman Conference on 6–8, pp. 108–117 (2002).Google Scholar
6. Lee, C., Lu, W., Piner, E., and Adesida, I., “Recessed-Gate GaN MESFET using ICP-RIE for High Temperature Microwave Applications”, Conference Digest. 58th DRC19–21, pp. 41–42 (2000).Google Scholar