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A CMOS Compatible Carbon Nanotube Growth Approach

Published online by Cambridge University Press:  23 March 2011

Daire Cott
IMEC, 75 Kapeldreef, Leuven, Belgium
Masahito Sugiura
Tokyo Electron Ltd., Technology Development Center, 650 Mitsuzawa, Hosaka-cho, Nirasaki, Yamanashi 407-0192, Japan
Nicolo Chiodarelli
IMEC, 75 Kapeldreef, Leuven, Belgium Electrical Engineering, Katholieke Universiteit Leuven, Leuven, Belgium;
Kai Arstila
IMEC, 75 Kapeldreef, Leuven, Belgium
Philipe M. Vereecken
IMEC, 75 Kapeldreef, Leuven, Belgium Center for Surface Chemistry and Catalysis, Katholieke Universiteit Leuven, Leuven, Belgium;
Bart Vereecke
IMEC, 75 Kapeldreef, Leuven, Belgium
Sven Van Elshocht
IMEC, 75 Kapeldreef, Leuven, Belgium
Stefan De Gendt
IMEC, 75 Kapeldreef, Leuven, Belgium Department.of Chemistry, Katholieke Universiteit Leuven, Leuven, Belgium.
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In future technology nodes, 22nm and below, carbon nanotubes (CNTs) may provide a viable alternative to Cu as an interconnect material. CNTs exhibit a current carrying capacity (up to 109 A/cm2), whilst also providing a significantly higher thermal conductivity (SWCNT ~ 5000 WmK) over Copper (106 A/cm2 and ~400WmK). However, exploiting such properties of CNTs in small vias is a challenging endeavor. In reality, to outperform Cu in terms of a reduction in via resistance alone, densities in the order of 1013 CNTs/cm2 are required. At present, conventional thermal CVD of carbon nanotubes is carried out at temperatures far in excess of CMOS temperature limits (400 C). Furthermore, high density CNT bundles are most commonly grown on insulating supports such as Al2O3 and SiO2 as they can effectively stabilize metallic nanoparticles at elevated temperatures but this limits their application in electronic devices. To circumvent these obstacles we employ a remote microwave plasma to grow high density CNTs at a temperature of 400 C on conductive underlayers such as TiN. We identify some critical factors important for high-quality CNTs at low temperatures such as control over the catalyst to underlayer interaction and plasma growth environment while presenting a fully CMOS compatible carbon nanotube synthesis approach

Research Article
Copyright © Materials Research Society 2011

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