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Reduction in Background Carrier Concentration for 4H-SiC C-face Epitaxial Growth

Published online by Cambridge University Press:  10 May 2016

Johji Nishio*
Affiliation:
Corporate R&D Center, Toshiba Corporation, 1 Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan Advanced Power Electronics Research Center, Advanced Industrial Science and Technology (AIST), Central 2-13, 1-1-1 Umezono, Tsukuba 305-8568, Japan
Hirokuni Asamizu
Affiliation:
Advanced Power Electronics Research Center, Advanced Industrial Science and Technology (AIST), Central 2-13, 1-1-1 Umezono, Tsukuba 305-8568, Japan Research and Development Division, ROHM Co., Ltd., 21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan
Mitsuhiro Kushibe
Affiliation:
Corporate R&D Center, Toshiba Corporation, 1 Komukai Toshiba-cho, Saiwai-ku, Kawasaki 212-8582, Japan Advanced Power Electronics Research Center, Advanced Industrial Science and Technology (AIST), Central 2-13, 1-1-1 Umezono, Tsukuba 305-8568, Japan
Hidenori Kitai
Affiliation:
Advanced Power Electronics Research Center, Advanced Industrial Science and Technology (AIST), Central 2-13, 1-1-1 Umezono, Tsukuba 305-8568, Japan
Kazutoshi Kojima
Affiliation:
Advanced Power Electronics Research Center, Advanced Industrial Science and Technology (AIST), Central 2-13, 1-1-1 Umezono, Tsukuba 305-8568, Japan
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Abstract

Reduction in background carrier concentration has been investigated for 4H-SiC C-face epitaxial growth in order to be applied for ultra-high voltage power devices. Optimizing epitaxial growth parameters made it possible to achieve 7.6x1013 cm-3 as the background carrier concentration within a whole area of specular 3-inch wafers. In addition to the background carrier concentration reduction, epitaxial film thickness variation, surface defect density and the carrier lifetime have been confirmed to fulfill the requirements for the devices.

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Copyright
Copyright © Materials Research Society 2016 

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References

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Reduction in Background Carrier Concentration for 4H-SiC C-face Epitaxial Growth
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