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Sample Preparation for Precise and Quantitative Electron Holographic Analysis of Semiconductor Devices

Published online by Cambridge University Press:  14 July 2006

Myung-Geun Han
Affiliation:
Center for Solid State Science, Arizona State University, Tempe, AZ 85287-1704, USA
Jing Li
Affiliation:
Center for Solid State Science, Arizona State University, Tempe, AZ 85287-1704, USA
Qianghua Xie
Affiliation:
Physical Analysis Laboratory, Advanced Products Research and Development Laboratory, Freescale Semiconductor Inc., Tempe, AZ 85284, USA
Peter Fejes
Affiliation:
Physical Analysis Laboratory, Advanced Products Research and Development Laboratory, Freescale Semiconductor Inc., Tempe, AZ 85284, USA
James Conner
Affiliation:
Physical Analysis Laboratory, Advanced Products Research and Development Laboratory, Freescale Semiconductor Inc., Austin, TX 78721, USA
Bill Taylor
Affiliation:
Physical Analysis Laboratory, Advanced Products Research and Development Laboratory, Freescale Semiconductor Inc., Austin, TX 78721, USA
Martha R. McCartney
Affiliation:
Center for Solid State Science, Arizona State University, Tempe, AZ 85287-1704, USA Department of Physics and Astronomy, Arizona State University, Tempe, AZ 85287-1504, USA

Abstract

Wedge polishing was used to prepare one-dimensional Si n-p junction and Si p-channel metal-oxide-silicon field effect transistor (pMOSFET) samples for precise and quantitative electrostatic potential analysis using off-axis electron holography. To avoid artifacts associated with ion milling, cloth polishing with 0.02-μm colloidal silica suspension was used for final thinning. Uniform thickness and no significant charging were observed by electron holography analysis for samples prepared entirely by this method. The effect of sample thickness was investigated and the minimum thickness for reliable results was found to be ∼160 nm. Below this thickness, measured phase changes were smaller than expected. For the pMOSFET sample, quantitative analysis of two-dimensional electrostatic potential distribution showed that the metallurgical gate length (separation between two extension junctions) was ∼54 nm, whereas the actual gate length was measured to be ∼70 nm by conventional transmission electron microscopy. Thus, source and drain junction encroachment under the gate was 16 nm.

Type
MATERIALS APPLICATIONS
Copyright
© 2006 Microscopy Society of America

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Sample Preparation for Precise and Quantitative Electron Holographic Analysis of Semiconductor Devices
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