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A design of analog VDD generator for passive UHF RFID Tag in 90 nm CMOS

Published online by Cambridge University Press:  20 June 2014

Smail Hassouni  and
Hassan Qjidaa
Smail Hassouni*
Affiliation:
Faculty of Sciences Dhar El Mehraz, Sidi Mohamed Ben Abdellah University, CED-ST, LESSI, BP 1796 Fez-Atlas 30003, Fez, Morocco
Hassan Qjidaa
Affiliation:
Faculty of Sciences Dhar El Mehraz, Sidi Mohamed Ben Abdellah University, CED-ST, LESSI, BP 1796 Fez-Atlas 30003, Fez, Morocco
*
Corresponding author: S. Hassouni Email: hassounismail@yahoo.fr
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Abstract

This paper introduces a VDD generator for the ultrahigh frequency (UHF) passive Radio-frequency identification (RFID) tag, consisting of an RF-limiter, an NMOS rectifier, a DC-limiter, and a regulator. The proposed NMOS rectifier utilizes diode-connected native NMOS transistors with ultralow-threshold voltage instead of Schottky diodes. The theoretical equations for predicting the performance of the VDD generator are provided and verified by both simulation results in 90 nm CMOS process. The proposed VDD generator generates a 1.19-V stable output voltage with low-power dissipation and a 26.96% larger power conversion efficiency under conditions of 50 Ω antenna, 900 MHz, −23 dBm input power and 1 M DC output load. The chip area of the proposed VDD generator is only 105 × 85 μm. The simulation results indicated that the presented novel VDD generator is capable to provide efficient, stable, and input-independent power supply for Passive UHF RFID tag

Keywords

Radio-frequency identification (RFID)Low-powerNMOS rectifierUltrahigh frequency (UHF)low voltageUltralow thresholdRegulator
Type
Research Paper
Information
International Journal of Microwave and Wireless Technologies , Volume 7 , Issue 5 , October 2015 , pp. 507 - 513
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2014 

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