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Omvpe Growth and Characterization of GaAs on Si for Device Applications

Published online by Cambridge University Press:  28 February 2011

S. K. Shastry
Affiliation:
GTE Laboratories Incorporated, 40 Sylvan Road Waltham, MA 02254
S. Zemon
Affiliation:
GTE Laboratories Incorporated, 40 Sylvan Road Waltham, MA 02254
C. Armiento
Affiliation:
GTE Laboratories Incorporated, 40 Sylvan Road Waltham, MA 02254
M. B. Stern
Affiliation:
GTE Laboratories Incorporated, 40 Sylvan Road Waltham, MA 02254
M. Levinson
Affiliation:
GTE Laboratories Incorporated, 40 Sylvan Road Waltham, MA 02254
L. Lehman
Affiliation:
GTE Laboratories Incorporated, 40 Sylvan Road Waltham, MA 02254
M. Rothman
Affiliation:
GTE Laboratories Incorporated, 40 Sylvan Road Waltham, MA 02254
D. Dugger
Affiliation:
GTE Laboratories Incorporated, 40 Sylvan Road Waltham, MA 02254
J. Hefter
Affiliation:
GTE Laboratories Incorporated, 40 Sylvan Road Waltham, MA 02254
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Abstract

Significant progress has been made in the OMVPE growth of GaAs directly on Si by the previously reported low-temperature growth technique. These films have been characterized by low-temperature PL, SIMS, TEM, and DLTS. The epitaxial layers, whose quality has been determined by PL measurements (4.2 K PL spectral width of heavy-hole exciton ≈ 3 meV), were implanted with 29Si+ for fabrication of MESFET channels. Background concentrations of ≈ 1014 cm−3 have been achieved for the first time after rapid thermal annealing without the need to use oxygen implantation or vanadium doping. SIMS measurements do not show Si pileup on the surface or much Si diffusion at the GaAs-Si interface, a significant improvement over earlier results. DLTS measurements and electrical characterization of the GaAs-Si heterojunction diode indicate the presence of only two trap levels (< 1014 cm−3 in concentration) in the GaAs ≥ 2.5 μm away from the interface.

Type
Research Article
Copyright
Copyright © Materials Research Society 1988

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References

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