For III-V device operation at 300 °C or above ohmic contacts have to consist of multilayered systems comprising an amorphous diffusion barrier. The contact system Au/Pt/Ti/WSiN/ Au/Ge/Ni-n-GaAs (n ≈ 5.1017 cm−3) has been developed and optimized with respect to the parameters of the barrier as well as the internal Au/Ge/Ni layers. The WSiN layer was deposited via reactive dc magnetron sputtering, the other layers by electron beam evaporation without breaking the vacuum. Annealing has been performed in a halogen lamp furnace. The contact resistance Rc as determined by TLM structures was measured as function of the annealing temperature and time. It was found that short-time annealings lead to a broad Rc minimum at 0.1 ωmm. For such Rc's the Au/Ge/Ni layer thicknesses must be ≥ 20/10/6 nm. Extended microstructural analysis was accomplished by XTEM/EDS and by AES and SNMS depth profiling. The typical alloying depth of the contact in the GaAs has been found to be about 50 nm, i.e. smaller than for the conventional Au/Ni/AuGe contact. The secondary phases formed (Au(Ga), NiGe(As)) are similar. With annealing conditions producing the desired Rc value, both Au(Ga) and NiGe(As) were observed in a bamboo-like arrangement at the metal-semiconductor interface. Degradation of Rc could be attributed to burying of the nickel-rich phases beneath gold-rich phases. This contact system is stable up to ≈ 300°C.