We have performed voltage-pulse stimulated capacitance transient measurements along with other junction capacitance measurements on a-Si:H/ a-Si,Ge:H heterostructures deposited on p-type crystalline silicon using the glow discharge technique. For a filling pulse that puts the c-Si/a-Si:H junction in forward bias, the capacitance transients consist of two components- a fast component corresponding to electron emission and a slow component corresponding to hole emission. For a fixed starting reverse bias, we have found that the density of trapped holes is proportional to the product of the filling pulse voltage and the filling pulse width and reaches a saturation value at a certain value of the product. These hole traps appear to reside at or very close to the a-Si:H/a-Si,Ge:H interface. The estimated trap concentration is around 1011/cm2 and is independent of temperature and applied bias, ruling out the creation of the traps during the filling pulse. We also report results on samples in which a-Si:H/ a-Si,Ge:H interface has been modified during growth to alter the concentration of the hole traps.