Cadmium Sulfide/Cadmium Telluride (CdS/CdTe) devices are subject to stress under various biases. Striking differences are observed with the Current-Voltage, and Capacitance- Voltage measurements for cells degraded at 100°C in dark under forward (FB), open circuit (OC), and reverse (RB) biases. RB stress provides the greatest degradation, and the apparent doping density profile shows anomalous behavior at the zero bias depletion width. Thin films of CdS, both doped and undoped, with Cu are characterized with photoluminescence (PL). The PL spectra from the CdS films are correlated with the CdS spectra from stressed devices, revealing that Cu signatures in the CdS layer of stressed devices are a function of stress biasing. Device modeling using AMPS-1D produces IV curves similar to that in RB degraded devices, by only varying the trap level concentration in the CdS layer.