DLTS measurements show that majority-carrier traps exist after quartz-lamp, rapid-thermal annealing (RTA) activation of B+ and BF2
+ ion implants in n-type silicon. Levels at Ec-0.17, 0.27, 0.44 and 0.57 eV annealed out with an additional 20 minute isochronal anneal at 550°C in argon. A stable defect at 0.37 eV existed at temperatures above 750°C. DLTS measurements of a Schottky diode on n-type silicon after only RTA indicated that electron traps could be introduced into n-type silicon by the RTA alone.