Next generation ULSI devices will require ultra thin gate insulators where degradation due to contamination or surface microroughness is an even more important problem. Tunneling and breakdown characteristics are critical electrical testing methods, but unfortunately obtaining meaningful oxide integrity information on the one hand and tunneling IV's on the other is a tedious and time consuming process.
In this research, we report on a new method to measure meaningful IV's, Q
's, and V
's at the same time. This method uses a linear current ramp strategy where a voltage ramp to between 8–10 MV/cm is applied first followed by a linear current ramp until breakdown is reached. There are several advantages of this new method: The linear voltage ramp quickly and easily identifies low breakdown devices, whereas switching to a linear current ramp provides for nearly constant field stressing to obtain meaningful IV and Q