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A low temperature plasma etching process for patterning copper interconnects is proposed as a solution to the size effect issue in the resistivity of copper. Key features of this etching process based on a previous thermochemical analysis of the Cu-Cl-H system are discussed. Potential benefits of a subtractive etching scheme based on this process in comparison with the damascene scheme for copper-based interconnect processing in sub-100 nm features are presented in the context of the ITRS roadmap. Preliminary experimental work on plasma etching of Cu thin films using the proposed process is discussed.
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