Following the general tendency of downsizing in microelectronic packages, the interposing layer between silicon chip and organic board is constantly reduced while the differences in thermal expansion stay constant. Consequently, thermal stresses have become the most important reliability concern in advanced packages. Finite element analysis is known as an effective way of theoretically studying the mechanical situation in multi-component systems with complex material behavior. The paper presents results of finite element simulations that provide practical guidance for design, process and material developments of chip size packaging (CSP), flip chip (FC), and direct chip attach (DCA) modules. Using realistic and efficient models, a low-cost CSP concept is assessed, the effects of underfill, underfill imperfections, and underfill defects on the reliability of FC modules are studied, and an optimum set of mechanical properties for underfill materials is proposed. Finally, reliability risk factors in DCA modules are identified and preliminary design guidelines are given.