Development of 3C–SiC-based electronics is hampered by film quality and wafer bow produced during growth on silicon. This work presents an approach aimed to improve the compliance between Si and 3C–SiC by manipulating Si substrate surface with the creation of an array of squared-base Inverted Silicon Pyramids (ISP) and stimulating the annihilation of defects created at the interface. A reduction of stacking fault (SF) linear density to a value of 9.31 × 103 cm−1 has been observed in 9-μm-thick 3C–SiC film on ISP, stimulated by the ISP geometry with SFs forced to meet one another within the first micrometer of growth. The initial growth of 3C–SiC on ISP is described suggesting a peculiar growth mode leading to uniform sample morphology after about 3 μm of growth. Finally, lower residual stress stored in 3C–SiC/ISP samples has been observed, due to a faster stress relaxation mechanism during the film growth.