Crystal-originated pits are known as the defects responsible for B-mode Time Zero Dielectric Break-down (TZDB) of the gate oxide grown on the surface of Si wafers. In order to clarify the breakdown mechanism, we have analyzed the structure of those defects formed at the surface of bare and oxidized wafers. In the latter case the analysis has been done both before and after gate oxide breakdown. Electric breakdown has been accomplished by Cu decoration method, recognized as an effective tool for unambiguous detection and positioning of the defects causing B-mode TZDB. As revealed by cross-sectional transmission electron microscopy (XTEM), crystal-originated pits at the bare wafer surface are polyhedral pits having about 5-nm-thick oxide layer on the inner walls. During gate oxidation the thermal oxide is growing faster on the pit walls than on the wafer surface, except for the pit comers where the oxide thinning has been observed. Resulting concave comers of the oxidized pits are suggested to be the weak spots where B-mode TZDB occurs.