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The threshold voltage (VT) degradation of asymmetric source-drain a-Si:H TFTs due to the electrical stress has been investigated. In the absence of a drain bias (VG=15V, VD=0V), the threshold voltage (VT) shifts of asymmetric TFTs were similar to that of symmetric TFT. However, in the presence of drain bias (VG=15V, VD=20V), the VT shifts of asymmetric TFTs were less than symmetric TFT. The VT shifts of ‘L’ and ‘J’ shaped TFT were 0.29V, 0.24V respectively, while the VT shift of ‘I’ shaped TFT was 0.42V.
The less VT degradation of the asymmetric source-drain a-Si:H TFT compared with the symmetric TFT may be explained by the defect creation model. Since the actual drain width of asymmetric TFT is longer than symmetric TFT at the same W/L ratio, the charge depletion due to the drain bias is larger than that of the asymmetric TFT. Due to the less carrier concentration in the channel, the asymmetric a-Si:H TFT shows the less VT degradation compared with the symmetric TFT.
We propose a pre-electrical bias aging to reduce threshold voltage (Vth) shift of hydrogenated- amorphous silicon thin-film transistor (a-Si:H TFT) for AMOLED display. The quantity of Vth shift in the sample subjected to a bias-aging is reduced due to the reduction of created dangling bond density, compared with a sample without a bias-aging. When an identical stress duration of 50,000 sec is applied to a-Si:H TFT with or without a pre-electrical bias-aging, the created dangling bond density (ΔNDB) after a pre-electrical bias-aging is decreased from 1.38 × 1011/cm2 to 0.685 × 1011/cm2. Our experimental results indicate that after the pre-electrical bias aging, a newly created dangling bond during an electrical stress is decreased because a weak bond density and hydrogen diffusion may be decreased.
An experimental scheme for validating the cause of the hysteresis phenomenon in hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) is reported. The different gate starting voltage to the desired gate voltage has been considered to prove an effect of filling an acceptor-like or donor-like state in the interface. The integration time of the semiconductor parameter analyzer (HP4156B) has also been controlled to investigate the effect between the detrapping rate and hysteresis. The experimental results show that the previous data voltage in the (n-1)th frame affects the OLED current in the (n)th frame.
We have proposed low hydrogen concentration (CH) silicon nitride (SiNX) as a dielectric for flexible display application. The fabrication temperature on plastic substrate is limited below Tg (glass transition temperature, typically 130˜180 °C) and it was reported that CH in thin film is strongly depends on fabrication temperature. As the fabrication temperature is decreasing, hydrogen concentration is increasing. SiNX deposited in ultra low temperature (< 150 °C) has high CH which is porous, low density. Our experimental results using SiH4, He, N2 gas mixture shows that in the SiNX CH is less than 15 at.%. Breakdown voltage of proposed SiNX dielectric is 5 MV/cm. In the wet etch rate test using a nitride etching solution, He dilution is more dense than NH3 dilution. This process approach is useful for flexible display application.
Nanocrystalline silicon (nc-Si) films were deposited by inductively coupled plasma chemical vapor deposition (ICP-CVD) at 150°C. ICP power was 400W. The process gas was SiH4 diluted with He as well as H2. The flow rate of He, H2 and He/H2 mixture was varied from 20sccm to 60sccm and that of SiH4 was 3sccm. X-ray diffraction (XRD) patterns of the nc-Si films were measured. From the XRD results of nc-Si films deposited by ICP-CVD, the properties of Si film deposited under each condition were studied. As the dilution ratio increases and He/H2 mixture was used as a dilution gas, intensities of <111>and<220> peaks were increased and the incubation layer was thin. These results were explained in the point of role of H2 plasma and He plasma in the nc-Si deposition process. Our experimental results show that nc-Si film deposited by ICP-CVD may be suitable for an active layer of nc-Si TFTs.
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