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Materials requirements for electrodes and barriers in high density dynamic random access memory (DRAM) and ferroelectric random access memory (FERAM) are reviewed, and some approaches to barrier materials and device geometries are described. Electrode/barrier topics covered in more detail include Pt reactivity with Si-containing barriers and dielectric overlayers, the application of a Bragg-Brentano x-ray diffraction technique to quantitatively probe Pt and Ir electrode morphology and thickness changes during ferroelectric processing, the stability of metal oxide electrode materials in reducing ambients, electrode patterning techniques (including Pt electroplating), and electrical properties of 3-D capacitors in 256k arrays as a function of top electrode annealing treatments.
This paper examines factors affecting the oxidation behavior of Ir thin film electrodes and the stability of bilayer Ir/Ir-Ir-O-Si electrodes on silicon substrates. We first examine the morphology and texture of faceted IrO2 extrusions formed on the Ir films during thermal oxidation, and show that an Ir grain-growth anneal in N2 at 650°C for 5 min prior to the oxidation treatment increases both the areal density of IrO2 extrusions and the IrO2<110> x-ray diffraction intensity while decreasing apparent film roughness. We then examine the stability of bilayer lr(100 nm)/Ir(20 nm) films on polycrystalline silicon and show how fairly mild oxygen anneals of the Ir(20 nm)/Si structures can provide an in-situ formed Ir-O-Si barrier that protects the subsequently deposited Ir(100 nm) layer from silicidation reactions during annealing in N2 ambients at 750°C. Transmission electron microscopy indicates that this in-situ formed barrier at the Ir/Si interface has a two layer structure comprising an IrSix underlayer in contact with the silicon substrate and an SiO2 overlayer directly below the remaining Ir.
A variety of diamondlike carbon (DLC) materials were investigated for their potential applications as low-k dielectrics for the back end of the line (BEOL) interconnect structures in ULSI circuits. Hydrogenated DLC and fluorine containing DLC (FDLC) were studied as a low-k interlevel and intralevel dielectrics (ILD), while silicon containing DLC (SiDLC) was studied as a potential low-k etch stop material between adjacent DLC based ILD layers, which can be patterned by oxygen-based plasma etching
It was found that the dielectric constant (k) of the DLC films can be varied between >3.3 and 2.7 by changing the deposition conditions. The thermal stability of these DLC films was found to be correlated to the values of the dielectric constant, decreasing with decreasing k. While DLC films having dielectric constants k>3.3 appeared to be stable to anneals of 4 hours at 400 °C in He, a film having a dielectric constant of 2.7 was not, losing more than half of its thickness upon exposure to the same anneal. The stresses in the DLC films were found to decrease with decreasing dielectric constant, from 700 MPa to about 250 MPa. FDLC films characterized by a dielectric constant of about 2.8 were found to have similar thermal stability as DLC films with k >3.3. The thermally stable FDLC films have internal stresses <300 MPa and are thus promising candidates as a low-k ILD.
For the range of Si contents examined (0-9% C replacement by Si), SiDLC films with a Si content of around 5% appear to provide an effective etch-stop for oxygen RIE of DLC or FDLC films, while retaining desirable electrical characteristics. These films showed a steady state DLC/SiDLC etch rate ratio of about 17, and a dielectric constant only about 30% higher than the 3.3 of DLC.
We demonstrate the use of a synchrotron radiation source for in situ x-ray diffraction analysis during rapid thermal annealing (RTA) of 0.35 μm Salicide (self-aligned silicide) and 0.4 μm Polycide (silicided polysilicon) TiSi2 Complementary Metal Oxide Semiconductor (CMOS) gate structures. It is shown that the transformation from the C49 to C54 phase of TiSi2 occurs at higher temperatures in submicron gate structures than in unpatterned blanket films. In addition, the C54 that forms in submicron structures is (040) oriented, while the C54 that forms in unpatterned Salicide films is randomly oriented. Although the preferred oreintation of the initial C49 phase was different in the Salicide and Polycide gate structures, the final orientation of the C54 phase formed was the same. An incomplete conversion of C49 into C54-TiSi2 during the RTA of Polycide gate structures was observed and is attributed to the retarding effects of phosphorus on the transition.
In this study we report on the KrF excimer laser deposition of crystalline films of lead magnesium niobium oxide (PMN) and solid solutions of PMN and lead titanate (PT) in a 65:35 ratio. These materials have potential microelectronic applications as thin film capacitors due to their high dielectric constants (εPMN(bulk) ≥ 10,000). Films were typically deposited in an oxygen background at elevated substrate temperatures(Ts = 525 °C) on substrates of Pt(111)/SiO2/Si or Pt(111)/glass. The deposited films were characterized by Rutherford Backscattering Spectroscopy (RBS), x-ray diffraction, and capacitance/loss measurements. Films prepared from a nearlystoichiometric commercial PMN target were low in Mg and Pb and yielded only the low-c pyrochlore phase (measured εfilm ≃ 100), even after cx-situ annealing at temperatures up to 650°C. Films deposited from Pb,Mg-rich targets prepared by a sol-gel process (tailored to produce the desired film stoichiometry) contained mixtures of perovskite and pyrochlore, with typical r values of order 600–1200.
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