A top gate pentacene TFT employing vapor deposited polyimide as a gate dielectric was fabricated. Polyimide was co-evaporated from 6FDA and ODA monomers and annealed at 150 °C in vacuum. The degree of imidization was verified by FT-IR. A breakdown voltage of 0.9 MV/cm of polyimide film was measured by MIM structure. A top gate pentacene TFT with W/L=25 has 0.01 cm2/Vs as a mobility, about 103 as an on-off ratio (In/off), −7.5V as a threshold voltage and 9 V per decade as a sub-threshold slope.

We demonstrated that the quality of siloxane spin-on glass (SOG) films, widely used as interlevel planarization dielectrics, is improved significantly by curing in argon plasma. The wet etch rate of SOG film decreases with increasing plasma treatment temperature or treatment time, and is much lower than that cured in a furnace. Long-time plasma treatment reduces the density of silanols (Si-OH) and methyl (−CH3) group, which act as adsorption sites of water. The results were compared with those obtained from the N2O (or H2 ) plasma treated SOG films. The modification of the SOG film by Ar plasma is related to the radiation damage and the reconstruction of the atomic structure during the plasma exposure. The role of metastable Ar (Ar*) appears to be very important to improve the SOG film; SOG film is more relaxed by the energy released from the conversion of Ar* to Ar.

The effects of SF6 and NF3 gas plasma treatments, and succesive rapid thermal anneal (RTA) treatment for the recovery of modified silicon surface due to CHF3/C2F6 plasma have been investigated using X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectrometry (SIMS). XPS analyses have revealed that NF3 and SF6 plasma treatments are effective for the removal of residue layer. SIMS results show that penetrated impurities in the contaminated silicon substrate reduce through the additional RTA treatment. The effects of NF3, SF6 plasmas, and additional RTA treatments for the recovery of reactive ion etched silicon surface has been also studied by measuring the electrical performance of the silicon devices.