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All-printed electronics is the key technology to ultra-low-cost, large-area electronics. As a critical step in this direction, we demonstrate that femtosecond laser processing (sintering and ablation) of solution deposited metal nanoparticles enables direct metal patterning at low-temperature with ultra high resolution (∼300nm) to overcome the resolution limitation of the current inkjet direct writing processes.
This could be explained by the combined effects of novel properties of metal nanoparticles such as melting temperature drop, strong absorption of the incident laser beam at surface plasmon mode, lower conductive heat transfer loss, and the relatively weak bonding between nanoparticles. Local thermal control of the laser sintering process could minimize the heat-affected zone and the thermal damage to the substrate and further enhance the resolution of the process. This local nanoparticle deposition and energy coupling enable an environmentally friendly and cost-effective process as well as a low-temperature manufacturing sequence to realize large-area, flexible electronics on polymer substrates.
The objective of this Research Communication was to use polymerase chain reaction-single stranded conformational polymorphism (PCR-SSCP) analysis to investigate a region of the bovine TLR4 gene (TLR4) in pasture-fed New Zealand (NZ) Holstein-Friesian × Jersey (HF × J) cross dairy cows and to determine whether gene variation was associated with milk production traits. Genetic variation was observed, with two variants (A and B) containing a single nucleotide polymorphism (SNP) (c.2021C/T) that was non-synonymous and putatively results in a p.Thr674Ile substitution in the transmembrane/cytoplasmic domain of TLR4. Variant A was associated with higher milk yields, but lower milk fat percentages, whereas B was associated with lower milk yields, but higher fat and protein percentages. Cows of genotype AA produced more milk than AB or BB cows, but the milk produced by AA cows contained less fat than AB or BB cows.
We have previously shown that the minor alleles of vascular endothelial growth factor A (VEGFA) single-nucleotide polymorphism rs833069 and superoxide dismutase 2 (SOD2) single-nucleotide polymorphism rs2758331 are both associated with improved transplant-free survival after surgery for CHD in infants, but the underlying mechanisms are unknown. We hypothesised that one or both of these minor alleles are associated with better systemic ventricular function, resulting in improved survival.
This study is a follow-up analysis of 422 non-syndromic CHD patients who underwent neonatal cardiac surgery with cardiopulmonary bypass. Echocardiographic reports were reviewed. Systemic ventricular function was subjectively categorised as normal, or as mildly, moderately, or severely depressed. The change in function was calculated as the change from the preoperative study to the last available study. Stepwise linear regression, adjusting for covariates, was performed for the outcome of change in ventricular function. Model comparison was performed using Akaike’s information criterion. Only variables that improved the model prediction of change in systemic ventricular function were retained in the final model.
Genetic and echocardiographic data were available for 335/422 subjects (79%). Of them, 33 (9.9%) developed worse systemic ventricular function during a mean follow-up period of 13.5 years. After covariate adjustment, the presence of the VEGFA minor allele was associated with preserved ventricular function (p=0.011).
These data support the hypothesis that the mechanism by which the VEGFA single-nucleotide polymorphism rs833069 minor allele improves survival may be the preservation of ventricular function. Further studies are needed to validate this genotype–phenotype association and to determine whether this mechanism is related to increased vascular endothelial growth factor production.
A single-grained Pb(Zr,Ti)O3 (PZT) was successfully grown for the gate dielectric of polycrystalline-silicon (poly-Si) thin-film transistor (TFT). The total structure was MoW/PZT/HfO2/poly-Si/glass. The giant single-grained PZT was obtained by controlling the artificial nucleation formed by Pt dots in a desirable location and enlarging the nucleated seed until it covers the poly-Si channel. The single-grained diameter size was 40 μm with a (100) dominated texture. The poly-Si memory device with single-grained PZT showed an excellent ferroelectric, electrical and reliability properties comparing with poly-Si memory device with poly-grained PZT. Moreover, eliminating the grain boundary in PZT film showed the fatigue and retention characteristics with only 1.1 % after 1013 cycles and 22 % after 1 month, respectively.
A novel nano-scale manipulator capable of handling low-dimensional materials with three-dimensional linear motion, gripping action, and push–pull action of the gripper was developed for an in situ experiment in transmission electron microscopy. X-Y-Z positioning and push–pull action were accomplished by a piezotubing system, combined with a specially designed assembly stage that consisted of a lever-action gripping tip backed by a push–pull piezostack. The gripper tip consisted of tungsten wire fabricated by electrochemical etching followed by a focused ion beam process. Performance of the nano-scale manipulator was demonstrated in a grab-and-pick test of a single silver nanowire and in an in situ tensile test of a pearlitic steel sample with a specific orientation.
This paper presents an improved Rao-Blackwellized particle filtering framework with consideration of the particle swarm characteristics in FastSLAM, called Relational FastSLAM or R-FastSLAM. The R-FastSLAM seeks to cope with the inherent problems of FastSLAM, i.e., a particle depletion problem and an error accumulation problem in large environments. The R-FastSLAM uses the particle swarm characteristics in calculating the importance weight and maintaining a particle formation. We assign more accurate weights to particles by clustering them using the Expectation-Maximization (EM) algorithm according to an adaptive weight compensation scheme. In addition, particles constitute an adaptive triangular mesh formation to maintain multiple data association hypotheses without any resampling step. Its outstanding accomplishments are verified on simulations and a test using the Victoria Park dataset by comparing the standard FastSLAM 2.0 with the particle swarm optimization based FastSLAM.
Longitudinal, patient-level data on resource use and costs after an ischemic stroke are lacking in Canada. The objectives of this analysis were to calculate costs for the first year post-stroke and determine the impact of disability on costs.
The Economic Burden of Ischemic Stroke (BURST) Study was a one-year prospective study with a cohort of ischemic stroke patients recruited at 12 Canadian stroke centres. Clinical history, disability, health preference and resource utilization information was collected at discharge, three months, six months and one year. Resources included direct medical costs (2009 CAN$) such as emergency services, hospitalizations, rehabilitation, physician services, diagnostics, medications, allied health professional services, homecare, medical/assistive devices, changes to residence and paid caregivers, as well as indirect costs. Results were stratified by disability measured at discharge using the modified Rankin Score (mRS): non-disabling stroke (mRS 0-2) and disabling stroke (mRS 3-5).
We enrolled 232 ischemic stroke patients (age 69.4 ± 15.4 years; 51.3% male) and 113 (48.7%) were disabled at hospital discharge. The average annual cost was $74,353; $107,883 for disabling strokes and $48,339 for non-disabling strokes.
An average annual cost for ischemic stroke was calculated in which a disabling stroke was associated with a two-fold increase in costs compared to NDS. Costs during the hospitalization to three months phase were the highest contributor to the annual cost. A “back of the envelope” calculation using 38,000 stroke admissions and the average annual cost yields $2.8 billion as the burden of ischemic stroke.
A transverse (d33) mode piezoelectric cantilever was fabricated for energy harvesting. Various dimensions of interdigital electrodes (IDE) were deposited on a piezoelectric layer to examine the effects of electrode design on the performance of energy harvesters. Modeling was performed to calculate the output power of the devices. The estimation was based on Roundy’s analytical modeling derived for a d31 mode piezoelectric energy harvester (PEH). In order to apply the Roundy’s model to d33 mode PEH, the IDE configuration was converted to the area of top and bottom electrodes (TBE). The power conversion in d33 mode PEH was commonly estimated by the product of piezoelectric layer’s thickness and finger electrode’s length. In addition, the spacing between fingers was regarded as gap between top and bottom electrodes. However, the output power in a transverse mode PEH increases continuously with the increase of finger spacing, which does not correspond to experimental results. In this research, the dimension of IDE was converted to that of TBE using conformal mapping, and variation of power of PEH was remodeled. The modified model suggests that the maximum power in a transverse mode PEH is obtained when the finger spacing is identical with effective finger spacing. The output power then decreases when finger spacing is larger than effective finger spacing. The decrease of efficiency may result from insufficient degree of poling and increased charged defect with increasing finger spacing.
In this article, we investigated the effect of Sn grain structure on the electromigration (EM) reliability of Sn–2.5Ag (wt%) solder joints used in flip-chip packages. The electron backscattering diffraction technique was applied to characterize the Sn grain size and orientation of the solder joints. Failure analyses on Sn–2.5Ag solder joints after EM tests showed that the Sn grain structure was important in controlling the kinetics of the intermetallic compound growth and void formation under EM. Further microstructural analysis revealed that the grain sizes and orientations of the solder joints after multiple solder reflows were statistically different from those with a single solder reflow and resulted in an improved EM reliability. Thermal annealing effect was also investigated to separate the thermal effect from the EM-induced effect. Results obtained in this study demonstrated that EM reliability of Pb-free solder joints could be improved by optimization of the Sn grain structure.
We fabricated PMOS SPC-Si TFTs which show better current uniformity than ELA poly-Si TFTs and superior stability compare to a-Si:H TFT on a glass substrate employing alternating magnetic field crystallization. However the leakage current of SPC-Si TFT was rather high for circuit element of AMOLED display due to many grain boundaries which could be electron hole generation centers. We applied off-state bias annealing of VGS=5V, VDS=-20V in order to suppress the leakage current of SPC-Si TFT. When the off-state bias annealing was applied on the SPC-Si TFT, the electron carriers were trapped in the gate insulator by high gate-drain voltage (25V). The trapped electron carriers could reduce the gate-drain field, so that the leakage current of SPC-Si TFT was reduced after off-state bias annealing. . We also applied same off state bias annealing at SPC-Si TFT with 20,000 lx light illumination in order to verify the reduction of leakage current of SPC-Si TFT under light illumination. The leakage current of SPC-Si TFT was reduced successfully even under light illumination during off-state bias annealing. The off-state bias annealed SPC-Si TFT could be used as pixel element of high quality AMOLED display.
The International Technology Roadmap for Semiconductors (ITRS) has projected that continued scaling of planar CMOS technology to the 65nm node and beyond will require development of high-k films for transistor gate dielectric applications to allow further scaling of overall device sizes according to Moore's Law . Researchers have recently been studying hafnium-based high-k dielectrics as an alternative to SiO2 . The method of deposition of these films has been found to impact the applicability of the films for both low standby power and high performance applications . Atomic Layer Deposition (ALD) has been among the more widely studied deposition techniques for these films, but previous work has emphasized ALD utilizing inorganic precursors . In this paper, we shall describe a process in which hafnium oxide and hafnium silicate films were deposited from alternating pulses of volatile metal-organic Hf/Si liquid precursors and ozone on 200mm diameter Si substrates using a single wafer ALD system. Electrical characterization of the films is presented, including equivalent oxide thickness (EOT), gate leakage, and electron mobility data, showing an achievement of EOT's ranging from 1.19 to 1.69 nm with high field mobilities from 74% to more than 90% of that of SiO2 (2.1 nm film), and Jg in the range of 80mA to 3 A/cm2.
New ALD processes for hafnium silicate films have been developed at Aviza Technology by co-injection of tetrakis(ethylmethylamino)hafnium and tetrakis(ethylmethylamino)silicon precursors. Alternating pulses of the Hf/Si precursor vapor mixture and ozone allow process temperatures below 400°C to grow HfxSi1-xO2 films. Film characterization, including film density, crystallinity, and thermal anneal effect, was performed on five 20 nm thick HfxSi1-xO2 films where x = 0.2, 0.4, 0.6, 0.8, 1.0. X-ray measurements revealed the film densities and thicknesses for the as-deposited and 1000°C annealed samples. The densification with anneals seen in the optical measurements were confirmed. The as-deposited amorphous HfO2 and Hf0.8Si0.2O2 were crystallized after a 600°C anneal. The HfO2 formed the well known monoclinic phase while the silicate formed a face-centered-cubic (fcc) structure. This fcc phase has only recently been mentioned in the literature .
The catalytic oxidation of methane was studied over palladium supported on nanocrystalline ceria. Three palladium weight loadings (1, 5, and 10 wt%) were tested after calcining at 500 °C, at 280 °C and after no calcination at all. For the 5 and 10 wt% loadings, the 280 °C-calcined and non-calcined catalysts exhibit enhanced activity after several heating and cooling cycles. Calcining these same catalysts at 500 °C results in a systematic decline in activity. For all pretreatments the 1 wt% Pd catalyst exhibits decreasing activity. For the 5 and 10 wt% Pd loadings, the non-calcined catalysts are more active than the 280 °C-calcined catalysts, which are more active than the 500 °C-calcined catalysts. For the 1 wt% Pd catalyst, the opposite is true. The catalyst activity improves as the Pd loading is increased.
Thin gold films with a thickness of 2mm were deposited on a silicon substrate by electron-beam evaporation. The material microstructure and internal stresses of the as-deposited gold films were characterized by scanning ion microscopy, orientation imaging microscopy, and X-ray diffraction. Microtensile tests of free-standing gold film samples were carried out to establish their intrinsic mechanical properties (in connection with a finite element analysis using crystal plasticity). Nanoindentation tests of the thin gold films attached to the silicon substrate were also carried out. Finite element analyses incorporating the crystal plasticity model were used to evaluate the effects of thin film textures, constraints due to the elastic substrate, and internal stresses on the plastic deformation behavior of the thin gold films under indentation at a direction normal to the film surfaces. Results of the combined experimental and numerical investigation indicate that the internal stresses have a strong effect on the uniaxial compression stress-strain behavior of the gold films and it may contribute to the relatively large hardness numbers obtained from the nanoindentation tests.
The failure of Si3N4 metal-insulator-metal (MIM) capacitors fabricated by plasma enhanced chemical vapor deposition (PECVD) was investigated using cross-sectional transmission electron microscopy (XTEM) and residual stress analysis. As a result we noted that the failure of the Si3N4 MIM capacitors originated from the microvoids formed over the Si3N4 dielectric and the TiN interlayer. The microvoid of the MIM capacitor, particularly in case of having a very thin Si3N4 of less than 50 nm-thick, caused it to leak out much of the current to the extent of a few microamperes even at bias of 3 volts. The formation of microvoids was explained by the residual stress of the constituent layers at a mechanistic point of view. The stress analysis showed that the absolute stress normalized by the thickness of the Si3N4 layer should be less than 31 MPa/nm to avoid microvoiding. In this research it was noted in conclusion that the stress state of not only the dielectric but also the interlayer should be taken into account for the successful design of high capacitive Si3N4 MIM capacitors.
The innovative Combustion Chemical Vapor Deposition (CCVD) process is a non-vacuum technique that is being investigated to enable next generation products in several application areas including high-temperature superconductors (HTS). In combination with the Rolling Assisted Biaxially Textured Substrate (RABiTS) technology, the CCVD process has significant promise to provide low-cost, high-quality lengths of YBCO coated conductor. The CCVD technology has been used to deposit both buffer layer coatings as well as YBCO superconducting layers. A buffer layer architecture of strontium titanate and ceria have been deposited by CCVD on textured nickel substrates and optimized to appropriate thicknesses and microstructures to provide templates for growing PLD YBCO with high critical current density values. The CCVD buffer layers have been scaled to meter plus lengths with good epitaxial uniformity along the length. A short sample cut from one of the lengths enabled high critical current density PLD YBCO. Films of CCVD YBCO superconductors have been grown on single crystal substrates with critical current densities over 1 MA/cm2. Work is currently in progress to combine both the buffer layer and superconductor technologies to produce high-quality coupons of HTS tape made entirely by the non-vacuum CCVD process.
This paper reports on characterization of the surface coverage of particles by in-situ lateral friction force measurement during chemical mechanical polishing. The lateral friction force apparatus was made to operate close to real CMP conditions. For these experiments a sapphire wafer of constant surface roughness was used. For both 2psi and 4psi down force we observed increase in lateral friction forces with increasing solid loading. The lateral friction forces have been found to be significantly dependent on the contact area at the wafer-pad-slurry interface, thus showing that in-situ dynamic friction force changes in the surface coverage of particles. From these results, we conclude that the enhancement of frictional force is due to increased contact area at the wafer-pad-slurry interfaces. The lateral friction force measurement can provide an understanding of wafer-pad-slurry interactions.