The adoption of copper (Cu) interconnects has imposed the challenge of developing a chemical vapor deposition (CVD) diffusion barrier technology that can be implemented for subhalf micron back-end design rules. Chemical vapor deposition (CVD) offers significantly higher film step coverage compared with sputter deposition processes. A number of materials have been proposed in literature for diffusion barriers of copper. However, the ability to suppress diffusion of Cu is only one of the barrier requirements out of a long list necessary for process integration. A number of other factors depend on the interaction of the barrier with Cu and with the underlying dielectric. We will begin with a review of some of the CVD candidate materials followed by a discussion on various interactions between barrier/Cu and barrier/dielectric that impact process reliability.
In addition there are manufacturing considerations ranging from availability of high purity precursor to complex issues of process compatibility, lowering defectivity, and reducing cost-ofownership (CoO). Ultimately, the choice may not necessarily be the most robust diffusion barrier but a process which provides adequate barrier properties and can be integrated easily and cost effectively to build Cu interconnect structures. Therefore, both materials and manufacturing requirements must be considered for selecting a barrier system.
A literature review is presented on some of the integration schemes and limitations they place on a barrier system. We will also share work done at Motorola on materials characterization and process development towards integration on some of the barrier processes. Finally, future trends in process development of diffusion barriers is presented.