The monolithic integration of high efficiency III-V compound solar cell materials and devices with lower-cost, robust and scaleable Si substrates has been a driving force in photovoltaics (PV) basic research for decades. Recent advances in controlling mismatch-induced defects that result from structural and chemical differences between III-V solar cell materials and Si using a combination of SiGe interlayers and monolayer-scale control of III-V/IV interfaces, have led to a series of fundamental advances at the material and device levels, which establish that the great potential of III-V/Si PV is within reach. These include demonstrations of GaAs epitaxial layers on Si that are anti-phase domain-free with verified dislocation densities at or below 1×106 cm−2 and negligible interface diffusion, minority carrier lifetimes for GaAs on Si in excess of 10 ns, single junction GaAs-based solar cells on Si with open circuit voltages (V
) in excess of 980 mV, efficiencies beyond 18%, and area-independent PV characteristics up to at least 4 cm2. These advances are attributed in large part to the use of a novel “engineered Si substrate” based on compositionally-graded SiGe buffers such that a high-quality, low defect density, relaxed, “virtual” Ge substrate could be developed that can support lattice-matched III-V epitaxy and thus merge III-V technology based on the GaAs (or Ge) lattice constant with Si wafers. This paper focuses on recent results that extend this work to the first demonstration of high performance III-V dual junction solar cells on SiGe/Si. Open circuit voltages in excess of 2 V at one-sun have been obtained for the conventionally “lattice-matched” In0.49Ga0.51P/GaAs dual junction cells on inactive, engineered SiGe/Si; to our knowledge is the first demonstration of > 2V solar power generation on a Si wafer. Comparisons with identical cells on GaAs substrates reveal that the V
on engineered Si retains more than 94% of its homoepitaxial value, and that at present both DJ/GaAs and DJ/SiGe/Si cells are similarly limited by current mismatch in these early cells, and not fundamental defect factors associated with the engineered Si substrates.