Total contact area between a CMP pad and wafer has emerged as a fundamental property that is directly linked to both removal rate and defectivity. Contact area has been shown to depend on surface morphology as it results from pad microstructure and material properties. Pads exhibiting higher contact area, hence imparting lower point stresses to the wafer, are effective in reducing CMP-related defects. The present study quantifies pad-wafer contact characteristics for both hard and soft porous polyurethane pads as a function of the extent of diamond conditioning. An Instron microtester is used to impart controlled quasi-static pad compression against a sapphire cover slip mounted on a Zeiss confocal microscope. Images collected through the microscope at discrete compressive states are analyzed off-line to quantify the total contact area and the size, shape, and distribution of individual contacts. A relationship is then established between these contact measures and the extent of conditioning. Conditioning decreases the mean asperity contact size as expected, but the evolution of contact regions shows non-intuitive features. In particular, total contact area passes through a minimum within the typical conditioning time of commercial CMP processes, then gradually increases. Clustered contact regions observed at short conditioning times spread out to a more uniform lateral spacing at longer conditioning times. These findings are accounted for by considering the texture subdivision achieved by individual diamonds together with bridging by the conditioning disk of higher regions on an unlevel pad surface. Textures produced by different conditioners on the same pad are quantified in terms of total contact area and number and uniformity of contact points. Formation of an ideal texture of abundant, well-spaced and level asperities is expedited by both conditioner type and treatment time. The results illustrate that evolution of pad contact area under compression is an essential measure for understanding polishing metrics such as wafer removal rate, defect count, and pad wear, and indicate clear direction for next-generation pad microstructures to achieve low-stress planarization.