Significant progress has been made in building multilevel copper interconnection systems for advanced microelectronics. In this article, we examine some of the materials science issues underlying this progress, and indicate where significant materials challenges remain. It is probable that several approaches to process integration will be developed for copper interconnections, as has been the case with aluminum systems. The first successful demonstration of a fully integrated 4-level copper/polyimide (Cu/PI) interconnection system has been described by Luther et al. of IBM. A schematic cross section of this interconnection system is shown in Figure 1, indicating multiple layers of BPDA-PDA polyimide (PI 5810), Cu lines and studs, and layers of Ta and Si3N4 which serve as diffusion barriers, adhesion layers, and stopping layers in the patterning and planarization processes. This system demonstrates excellent planarity, as shown in the SEM cross section in Figure 2. The electromigration lifetime of this Cu/PI system is greatly improved relative to state-of-the-art aluminum-based systems, and the dielectric integrity appears adequate. Signal propagation studies also confirm the performance improvements anticipated for copper as a low-resistivity conductor and the use of Cu may allow significant capacitance reduction (≃ 25%) simply by scaling Cu lines to equal the resistance of Al lines. In parallel with efforts to introduce Cu metallization for its low resistivity, extensive efforts are under way to replace SiO2 with lower dielectric constant insulators.